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| author | Ralf Baechle <ralf@linux-mips.org> | 2007-06-12 14:04:09 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-06-26 19:57:33 +0200 |
| commit | c8eae71dc81af15809d87d7aabb94810cea9577d (patch) | |
| tree | 15dbc5de3a7fbd6bc1a7b2b1f0291e07218a4709 /arch/mips/kernel/cpu-probe.c | |
| parent | [MIPS] AP/SP requires shadow registers, auto enable support. (diff) | |
| download | linux-c8eae71dc81af15809d87d7aabb94810cea9577d.tar.xz linux-c8eae71dc81af15809d87d7aabb94810cea9577d.zip | |
[MIPS] 20K: Handle WAIT related bugs according to errata information
We used to avoid the WAIT entirely on the 20K but really only need to do
this on early revs of the 20K. Without this a 20K was a bit of a
power hog. Well, in the lower power power hog category ;-)
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/cpu-probe.c')
| -rw-r--r-- | arch/mips/kernel/cpu-probe.c | 12 |
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index ab755ea26c6a..0fc90ba16ae1 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -137,7 +137,6 @@ static inline void check_wait(void) case CPU_4KEC: case CPU_4KSC: case CPU_5KC: -/* case CPU_20KC:*/ case CPU_24K: case CPU_25KF: case CPU_34K: @@ -156,6 +155,17 @@ static inline void check_wait(void) if (allow_au1k_wait) cpu_wait = au1k_wait; break; + case CPU_20KC: + /* + * WAIT on Rev1.0 has E1, E2, E3 and E16. + * WAIT on Rev2.0 and Rev3.0 has E16. + * Rev3.1 WAIT is nop, why bother + */ + if ((c->processor_id & 0xff) <= 0x64) + break; + + cpu_wait = r4k_wait; + break; case CPU_RM9000: if ((c->processor_id & 0x00ff) >= 0x40) cpu_wait = r4k_wait; |