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| author | Raghu Gandham <Raghu.Gandham@imgtec.com> | 2013-04-10 23:30:12 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2013-05-09 17:55:21 +0200 |
| commit | 0ab2b7d08ea7226dc72ff0f8c05f470566facf7c (patch) | |
| tree | 7b791c6907a47733b1256da5e20600d182b36d40 /arch/mips/kernel/irq-gic.c | |
| parent | MIPS: Formatting clean-ups for clocksources. (diff) | |
| download | linux-0ab2b7d08ea7226dc72ff0f8c05f470566facf7c.tar.xz linux-0ab2b7d08ea7226dc72ff0f8c05f470566facf7c.zip | |
MIPS: Add new GIC clockevent driver.
Add new clockevent driver that uses the counter present on the MIPS
Global Interrupt Controller.
Signed-off-by: Raghu Gandham <Raghu.Gandham@imgtec.com>
Signed-off-by: Steven J. Hill <Steven.Hill@imgtec.com>
Diffstat (limited to 'arch/mips/kernel/irq-gic.c')
| -rw-r--r-- | arch/mips/kernel/irq-gic.c | 31 |
1 files changed, 30 insertions, 1 deletions
diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c index 6a476e1d41eb..c01b307317a9 100644 --- a/arch/mips/kernel/irq-gic.c +++ b/arch/mips/kernel/irq-gic.c @@ -33,7 +33,7 @@ static struct gic_pcpu_mask pcpu_masks[NR_CPUS]; static struct gic_pending_regs pending_regs[NR_CPUS]; static struct gic_intrmask_regs intrmask_regs[NR_CPUS]; -#ifdef CONFIG_CSRC_GIC +#if defined(CONFIG_CSRC_GIC) || defined(CONFIG_CEVT_GIC) cycle_t gic_read_count(void) { unsigned int hi, hi2, lo; @@ -46,6 +46,24 @@ cycle_t gic_read_count(void) return (((cycle_t) hi) << 32) + lo; } + +void gic_write_compare(cycle_t cnt) +{ + GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_COMPARE_HI), + (int)(cnt >> 32)); + GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_COMPARE_LO), + (int)(cnt & 0xffffffff)); +} + +cycle_t gic_read_compare(void) +{ + unsigned int hi, lo; + + GICREAD(GIC_REG(VPE_LOCAL, GIC_VPE_COMPARE_HI), hi); + GICREAD(GIC_REG(VPE_LOCAL, GIC_VPE_COMPARE_LO), lo); + + return (((cycle_t) hi) << 32) + lo; +} #endif unsigned int gic_get_timer_pending(void) @@ -134,6 +152,17 @@ static void __init vpe_local_setup(unsigned int numvpes) } } +unsigned int gic_compare_int(void) +{ + unsigned int pending; + + GICREAD(GIC_REG(VPE_LOCAL, GIC_VPE_PEND), pending); + if (pending & GIC_VPE_PEND_CMP_MSK) + return 1; + else + return 0; +} + unsigned int gic_get_int(void) { unsigned int i; |