diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2007-10-12 00:46:15 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2007-10-12 00:46:15 +0200 |
| commit | 49a89efbbbcc178a39555c43bd59a7593c429664 (patch) | |
| tree | 93ab78ec340d3f2fe23f9f853edd0bd62dcc64bb /arch/mips/kernel/irq-msc01.c | |
| parent | [MIPS] Allow hardwiring of the CPU type to a single type for optimization. (diff) | |
| download | linux-49a89efbbbcc178a39555c43bd59a7593c429664.tar.xz linux-49a89efbbbcc178a39555c43bd59a7593c429664.zip | |
[MIPS] Fix "no space between function name and open parenthesis" warnings.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/irq-msc01.c')
| -rw-r--r-- | arch/mips/kernel/irq-msc01.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/kernel/irq-msc01.c b/arch/mips/kernel/irq-msc01.c index 1ecdd50bfc60..4edc7e451d91 100644 --- a/arch/mips/kernel/irq-msc01.c +++ b/arch/mips/kernel/irq-msc01.c @@ -99,7 +99,7 @@ void ll_msc_irq(void) } void -msc_bind_eic_interrupt (unsigned int irq, unsigned int set) +msc_bind_eic_interrupt(unsigned int irq, unsigned int set) { MSCIC_WRITE(MSC01_IC_RAMW, (irq<<MSC01_IC_RAMW_ADDR_SHF) | (set<<MSC01_IC_RAMW_DATA_SHF)); @@ -130,7 +130,7 @@ void __init init_msc_irqs(unsigned long icubase, unsigned int irqbase, msc_irqma { extern void (*board_bind_eic_interrupt)(unsigned int irq, unsigned int regset); - _icctrl_msc = (unsigned long) ioremap (icubase, 0x40000); + _icctrl_msc = (unsigned long) ioremap(icubase, 0x40000); /* Reset interrupt controller - initialises all registers to 0 */ MSCIC_WRITE(MSC01_IC_RST, MSC01_IC_RST_RST_BIT); |