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author | Markos Chandras <markos.chandras@imgtec.com> | 2015-07-14 10:14:12 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2015-08-26 15:23:12 +0200 |
commit | c0b584a2691ccbc3c0d4e6cb1874bcf00a921371 (patch) | |
tree | bf9c066b0cf5102ee911d38209b105f8f6aaf7e2 /arch/mips/kernel/mips-cm.c | |
parent | MIPS: Add platform callback before initializing the L2 cache (diff) | |
download | linux-c0b584a2691ccbc3c0d4e6cb1874bcf00a921371.tar.xz linux-c0b584a2691ccbc3c0d4e6cb1874bcf00a921371.zip |
MIPS: mips-cm: Extend CM accessors for 64-bit CPUs
Previously, the CM accessors were only accessing CM registers as u32
types instead of using the native CM register with. However, newer CMs
may actually be 64-bit on MIPS64 cores. Fortunately, current 64-bit CMs
(CM3) hold all the useful configuration bits in the lower half of the
64-bit registers (at least most of them) so they can still be accessed
using the current 32-bit accessors.
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10707/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/mips-cm.c')
-rw-r--r-- | arch/mips/kernel/mips-cm.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/kernel/mips-cm.c b/arch/mips/kernel/mips-cm.c index 42602f30949f..3d2cb6f47898 100644 --- a/arch/mips/kernel/mips-cm.c +++ b/arch/mips/kernel/mips-cm.c @@ -15,6 +15,7 @@ void __iomem *mips_cm_base; void __iomem *mips_cm_l2sync_base; +int mips_cm_is64; phys_addr_t __mips_cm_phys_base(void) { @@ -124,5 +125,8 @@ int mips_cm_probe(void) /* probe for an L2-only sync region */ mips_cm_probe_l2sync(); + /* determine register width for this CM */ + mips_cm_is64 = config_enabled(CONFIG_64BIT) && (mips_cm_revision() >= CM_REV_CM3); + return 0; } |