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| author | Paul Burton <paul.burton@mips.com> | 2018-09-26 22:56:51 +0200 |
|---|---|---|
| committer | Paul Burton <paul.burton@mips.com> | 2018-09-26 22:56:51 +0200 |
| commit | eb75ecb113f5804a83967b943f29c1024a157087 (patch) | |
| tree | 06ef353bbc9f75614cdfbba36d75d512b85ac043 /arch/mips/kernel/mips-mt.c | |
| parent | MIPS: Add Kconfig variable for CPUs with unaligned load/store instructions (diff) | |
| download | linux-eb75ecb113f5804a83967b943f29c1024a157087.tar.xz linux-eb75ecb113f5804a83967b943f29c1024a157087.zip | |
MIPS: MT: Remove unused MT single-threaded cache flush code
Commit ac41f9c46282 ("MIPS: Remove a temporary hack for debugging cache
flushes in SMTC configuration") removed an ugly hack that allowed cache
flushing to be performed single-threaded, something which should not be
necessary outside of debug sessions performed long ago.
Whilst the hack was removed from the cache flush code itself, the
mt_protdflush & mt_protiflush variables were left behind along with code
providing the protdflush & protiflush command line arguments. The
mt_cflush_lockdown() & mt_cflush_release() functions were also left
behind but are now entirely unused.
Remove all the unused code to complete the removal of the MT ASE
single-threaded cache flush hack.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Diffstat (limited to '')
| -rw-r--r-- | arch/mips/kernel/mips-mt.c | 20 |
1 files changed, 0 insertions, 20 deletions
diff --git a/arch/mips/kernel/mips-mt.c b/arch/mips/kernel/mips-mt.c index efaa2527657d..f74f6f505b15 100644 --- a/arch/mips/kernel/mips-mt.c +++ b/arch/mips/kernel/mips-mt.c @@ -155,25 +155,9 @@ static int __init config7_set(char *str) __setup("config7=", config7_set); /* Experimental cache flush control parameters that should go away some day */ -int mt_protiflush; -int mt_protdflush; int mt_n_iflushes = 1; int mt_n_dflushes = 1; -static int __init set_protiflush(char *s) -{ - mt_protiflush = 1; - return 1; -} -__setup("protiflush", set_protiflush); - -static int __init set_protdflush(char *s) -{ - mt_protdflush = 1; - return 1; -} -__setup("protdflush", set_protdflush); - static int __init niflush(char *s) { get_option(&s, &mt_n_iflushes); @@ -233,10 +217,6 @@ void mips_mt_set_cpuoptions(void) } /* Report Cache management debug options */ - if (mt_protiflush) - printk("I-cache flushes single-threaded\n"); - if (mt_protdflush) - printk("D-cache flushes single-threaded\n"); if (mt_n_iflushes != 1) printk("I-Cache Flushes Repeated %d times\n", mt_n_iflushes); if (mt_n_dflushes != 1) |