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authorDavid Daney <david.daney@cavium.com>2011-09-24 02:29:55 +0200
committerRalf Baechle <ralf@linux-mips.org>2011-10-25 00:34:26 +0200
commit4409af37b83587097e6d0f675a4ed0bb2ca0ee59 (patch)
treea5da11a64ed8c611de3266375f472191e3888b67 /arch/mips/kernel/perf_event.c
parentMIPS: Add accessor macros for 64-bit performance counter registers. (diff)
downloadlinux-4409af37b83587097e6d0f675a4ed0bb2ca0ee59.tar.xz
linux-4409af37b83587097e6d0f675a4ed0bb2ca0ee59.zip
MIPS: perf: Cleanup formatting in arch/mips/kernel/perf_event.c
Get rid of a bunch of useless inline declarations, and join a bunch of improperly split lines. Signed-off-by: David Daney <david.daney@cavium.com> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Paul Mackerras <paulus@samba.org> Cc: Ingo Molnar <mingo@elte.hu> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Deng-Cheng Zhu <dengcheng.zhu@gmail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2793/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/perf_event.c')
-rw-r--r--arch/mips/kernel/perf_event.c26
1 files changed, 11 insertions, 15 deletions
diff --git a/arch/mips/kernel/perf_event.c b/arch/mips/kernel/perf_event.c
index 0aee944ac380..f3d6e99ab575 100644
--- a/arch/mips/kernel/perf_event.c
+++ b/arch/mips/kernel/perf_event.c
@@ -118,10 +118,9 @@ struct mips_pmu {
static const struct mips_pmu *mipspmu;
-static int
-mipspmu_event_set_period(struct perf_event *event,
- struct hw_perf_event *hwc,
- int idx)
+static int mipspmu_event_set_period(struct perf_event *event,
+ struct hw_perf_event *hwc,
+ int idx)
{
struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
s64 left = local64_read(&hwc->period_left);
@@ -162,8 +161,8 @@ mipspmu_event_set_period(struct perf_event *event,
}
static void mipspmu_event_update(struct perf_event *event,
- struct hw_perf_event *hwc,
- int idx)
+ struct hw_perf_event *hwc,
+ int idx)
{
struct cpu_hw_events *cpuc = &__get_cpu_var(cpu_hw_events);
unsigned long flags;
@@ -420,8 +419,7 @@ static struct pmu pmu = {
.read = mipspmu_read,
};
-static inline unsigned int
-mipspmu_perf_event_encode(const struct mips_perf_event *pev)
+static unsigned int mipspmu_perf_event_encode(const struct mips_perf_event *pev)
{
/*
* Top 8 bits for range, next 16 bits for cntr_mask, lowest 8 bits for
@@ -437,8 +435,7 @@ mipspmu_perf_event_encode(const struct mips_perf_event *pev)
#endif
}
-static const struct mips_perf_event *
-mipspmu_map_general_event(int idx)
+static const struct mips_perf_event *mipspmu_map_general_event(int idx)
{
const struct mips_perf_event *pev;
@@ -449,8 +446,7 @@ mipspmu_map_general_event(int idx)
return pev;
}
-static const struct mips_perf_event *
-mipspmu_map_cache_event(u64 config)
+static const struct mips_perf_event *mipspmu_map_cache_event(u64 config)
{
unsigned int cache_type, cache_op, cache_result;
const struct mips_perf_event *pev;
@@ -513,9 +509,9 @@ static int validate_group(struct perf_event *event)
}
/* This is needed by specific irq handlers in perf_event_*.c */
-static void
-handle_associated_event(struct cpu_hw_events *cpuc,
- int idx, struct perf_sample_data *data, struct pt_regs *regs)
+static void handle_associated_event(struct cpu_hw_events *cpuc,
+ int idx, struct perf_sample_data *data,
+ struct pt_regs *regs)
{
struct perf_event *event = cpuc->events[idx];
struct hw_perf_event *hwc = &event->hw;