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| author | Al Viro <viro@zeniv.linux.org.uk> | 2016-05-11 06:00:29 +0200 |
|---|---|---|
| committer | Al Viro <viro@zeniv.linux.org.uk> | 2016-05-11 06:00:29 +0200 |
| commit | e4d35be584be88a3db3fa5635a97c62a2ec5aafe (patch) | |
| tree | fc22a7fb65697306edd71411959ccee6df60c64d /arch/mips/kernel/perf_event_mipsxx.c | |
| parent | get_rock_ridge_filename(): handle malformed NM entries (diff) | |
| parent | ovl: ignore permissions on underlying lookup (diff) | |
| download | linux-e4d35be584be88a3db3fa5635a97c62a2ec5aafe.tar.xz linux-e4d35be584be88a3db3fa5635a97c62a2ec5aafe.zip | |
Merge branch 'ovl-fixes' into for-linus
Diffstat (limited to 'arch/mips/kernel/perf_event_mipsxx.c')
| -rw-r--r-- | arch/mips/kernel/perf_event_mipsxx.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c index d7b8dd43147a..9bc1191b1ab0 100644 --- a/arch/mips/kernel/perf_event_mipsxx.c +++ b/arch/mips/kernel/perf_event_mipsxx.c @@ -530,7 +530,7 @@ static void mipspmu_enable(struct pmu *pmu) /* * MIPS performance counters can be per-TC. The control registers can - * not be directly accessed accross CPUs. Hence if we want to do global + * not be directly accessed across CPUs. Hence if we want to do global * control, we need cross CPU calls. on_each_cpu() can help us, but we * can not make sure this function is called with interrupts enabled. So * here we pause local counters and then grab a rwlock and leave the |