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authorJames Morris <jmorris@namei.org>2011-04-19 13:32:41 +0200
committerJames Morris <jmorris@namei.org>2011-04-19 13:32:41 +0200
commitd4ab4e6a23f805abb8fc3cc34525eec3788aeca1 (patch)
treeeefd82c155bc27469a85667d759cd90facf4a6e3 /arch/mips/kernel/perf_event_mipsxx.c
parentTOMOYO: Fix infinite loop bug when reading /sys/kernel/security/tomoyo/audit (diff)
parentMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dto... (diff)
downloadlinux-d4ab4e6a23f805abb8fc3cc34525eec3788aeca1.tar.xz
linux-d4ab4e6a23f805abb8fc3cc34525eec3788aeca1.zip
Merge branch 'master'; commit 'v2.6.39-rc3' into next
Diffstat (limited to 'arch/mips/kernel/perf_event_mipsxx.c')
-rw-r--r--arch/mips/kernel/perf_event_mipsxx.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kernel/perf_event_mipsxx.c b/arch/mips/kernel/perf_event_mipsxx.c
index d9a7db78ed62..75266ff4cc33 100644
--- a/arch/mips/kernel/perf_event_mipsxx.c
+++ b/arch/mips/kernel/perf_event_mipsxx.c
@@ -721,7 +721,7 @@ static void mipsxx_pmu_start(void)
/*
* MIPS performance counters can be per-TC. The control registers can
- * not be directly accessed accross CPUs. Hence if we want to do global
+ * not be directly accessed across CPUs. Hence if we want to do global
* control, we need cross CPU calls. on_each_cpu() can help us, but we
* can not make sure this function is called with interrupts enabled. So
* here we pause local counters and then grab a rwlock and leave the