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author | Paul Burton <paul.burton@imgtec.com> | 2017-08-23 20:17:54 +0200 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2017-08-29 15:21:55 +0200 |
commit | b7fc2cc59aa5f49ecd1eae4f90ec229a7e52c47c (patch) | |
tree | 87c719e99b8f2c9891f4c72378af9aa616c129f2 /arch/mips/kernel/pm-cps.c | |
parent | MIPS: Remove plat_timer_setup() (diff) | |
download | linux-b7fc2cc59aa5f49ecd1eae4f90ec229a7e52c47c.tar.xz linux-b7fc2cc59aa5f49ecd1eae4f90ec229a7e52c47c.zip |
MIPS: Declare various variables & functions static
We currently have various variables & functions which are only used
within a single translation unit, but which we don't declare static.
This causes various sparse warnings of the form:
arch/mips/kernel/mips-r2-to-r6-emul.c:49:1: warning: symbol
'mipsr2emustats' was not declared. Should it be static?
arch/mips/kernel/unaligned.c:1381:11: warning: symbol 'reg16to32st'
was not declared. Should it be static?
arch/mips/mm/mmap.c:146:15: warning: symbol 'arch_mmap_rnd' was not
declared. Should it be static?
Fix these & others by declaring various affected variables & functions
static, avoiding the sparse warnings & redundant symbols.
[ralf@linux-mips.org: Add Marcin's build fix.]
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: trivial@kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17176/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/pm-cps.c')
-rw-r--r-- | arch/mips/kernel/pm-cps.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kernel/pm-cps.c b/arch/mips/kernel/pm-cps.c index d99416094ba9..2121ed635824 100644 --- a/arch/mips/kernel/pm-cps.c +++ b/arch/mips/kernel/pm-cps.c @@ -49,7 +49,7 @@ static DEFINE_PER_CPU_READ_MOSTLY(cps_nc_entry_fn[CPS_PM_STATE_COUNT], nc_asm_enter); /* Bitmap indicating which states are supported by the system */ -DECLARE_BITMAP(state_support, CPS_PM_STATE_COUNT); +static DECLARE_BITMAP(state_support, CPS_PM_STATE_COUNT); /* * Indicates the number of coupled VPEs ready to operate in a non-coherent |