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| author | Matt Redfearn <matt.redfearn@imgtec.com> | 2016-07-07 09:50:38 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2016-07-24 12:19:12 +0200 |
| commit | 9736c6152ef6fbb688c05c75b250304787fc9ff7 (patch) | |
| tree | 24ff9184f805c9a7273398a34c1f0d6190a7b0d6 /arch/mips/kernel/smp-cps.c | |
| parent | MIPS: Octeon: cavium_octeon_defconfig: Enable OCTEON SATA (diff) | |
| download | linux-9736c6152ef6fbb688c05c75b250304787fc9ff7.tar.xz linux-9736c6152ef6fbb688c05c75b250304787fc9ff7.zip | |
MIPS: smp-cps: Allow booting of CPU other than VP0 within a core
The boot_core function was hardcoded to always start VP0 when starting
a core via the CPC. When hotplugging a CPU this may not be the desired
behaviour.
Make boot_core receive the VP ID to start running on the core, such that
alternate VPs can be started via CPU hotplug.
Also ensure that all other VPs within the core are stopped before
bringing the core out of reset so that only the desired VP starts.
Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com>
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Cc: Matt Redfearn <matt.redfearn@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/13750/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/smp-cps.c')
| -rw-r--r-- | arch/mips/kernel/smp-cps.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c index 4ed36f288d64..006e99de170d 100644 --- a/arch/mips/kernel/smp-cps.c +++ b/arch/mips/kernel/smp-cps.c @@ -206,7 +206,7 @@ err_out: } } -static void boot_core(unsigned core) +static void boot_core(unsigned int core, unsigned int vpe_id) { u32 access, stat, seq_state; unsigned timeout; @@ -233,8 +233,9 @@ static void boot_core(unsigned core) mips_cpc_lock_other(core); if (mips_cm_revision() >= CM_REV_CM3) { - /* Run VP0 following the reset */ - write_cpc_co_vp_run(0x1); + /* Run only the requested VP following the reset */ + write_cpc_co_vp_stop(0xf); + write_cpc_co_vp_run(1 << vpe_id); /* * Ensure that the VP_RUN register is written before the @@ -306,7 +307,7 @@ static void cps_boot_secondary(int cpu, struct task_struct *idle) if (!test_bit(core, core_power)) { /* Boot a VPE on a powered down core */ - boot_core(core); + boot_core(core, vpe_id); goto out; } |