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author | Ralf Baechle <ralf@linux-mips.org> | 2015-04-13 16:03:32 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2015-04-13 16:03:32 +0200 |
commit | 3e20a26b02bd4f24945c87407df51948dd488620 (patch) | |
tree | f466d3b2a47a98ec2910724e17ee2f3a93c1a49e /arch/mips/kernel/smp-cps.c | |
parent | Merge branch '4.1-fp' into mips-for-linux-next (diff) | |
parent | MIPS: Makefile: Fix MIPS ASE detection code (diff) | |
download | linux-3e20a26b02bd4f24945c87407df51948dd488620.tar.xz linux-3e20a26b02bd4f24945c87407df51948dd488620.zip |
Merge branch '4.0-fixes' into mips-for-linux-next
Diffstat (limited to 'arch/mips/kernel/smp-cps.c')
-rw-r--r-- | arch/mips/kernel/smp-cps.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/mips/kernel/smp-cps.c b/arch/mips/kernel/smp-cps.c index bed7590e475f..d5589bedd0a4 100644 --- a/arch/mips/kernel/smp-cps.c +++ b/arch/mips/kernel/smp-cps.c @@ -88,6 +88,12 @@ static void __init cps_smp_setup(void) /* Make core 0 coherent with everything */ write_gcr_cl_coherence(0xff); + +#ifdef CONFIG_MIPS_MT_FPAFF + /* If we have an FPU, enroll ourselves in the FPU-full mask */ + if (cpu_has_fpu) + cpu_set(0, mt_fpu_cpumask); +#endif /* CONFIG_MIPS_MT_FPAFF */ } static void __init cps_prepare_cpus(unsigned int max_cpus) |