diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2006-10-07 20:44:33 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2006-10-08 03:38:28 +0200 |
| commit | 937a801576f954bd030d7c4a5a94571710d87c0b (patch) | |
| tree | 48d3440f765b56cf32a89b4b8193dd033d8227a8 /arch/mips/kernel/smp-mt.c | |
| parent | [MIPS] Show actual CPU information in /proc/cpuinfo (diff) | |
| download | linux-937a801576f954bd030d7c4a5a94571710d87c0b.tar.xz linux-937a801576f954bd030d7c4a5a94571710d87c0b.zip | |
[MIPS] Complete fixes after removal of pt_regs argument to int handlers.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/smp-mt.c')
| -rw-r--r-- | arch/mips/kernel/smp-mt.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c index 766253c44f3f..3b5f3b632622 100644 --- a/arch/mips/kernel/smp-mt.c +++ b/arch/mips/kernel/smp-mt.c @@ -106,22 +106,22 @@ void __init sanitize_tlb_entries(void) clear_c0_mvpcontrol(MVPCONTROL_VPC); } -static void ipi_resched_dispatch (struct pt_regs *regs) +static void ipi_resched_dispatch(void) { - do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ, regs); + do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ); } -static void ipi_call_dispatch (struct pt_regs *regs) +static void ipi_call_dispatch(void) { - do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ, regs); + do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ); } -irqreturn_t ipi_resched_interrupt(int irq, void *dev_id, struct pt_regs *regs) +static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) { return IRQ_HANDLED; } -irqreturn_t ipi_call_interrupt(int irq, void *dev_id, struct pt_regs *regs) +static irqreturn_t ipi_call_interrupt(int irq, void *dev_id) { smp_call_function_interrupt(); @@ -250,8 +250,8 @@ void __init plat_prepare_cpus(unsigned int max_cpus) { /* set up ipi interrupts */ if (cpu_has_vint) { - set_vi_handler (MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch); - set_vi_handler (MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch); + set_vi_handler(MIPS_CPU_IPI_RESCHED_IRQ, ipi_resched_dispatch); + set_vi_handler(MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch); } cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ; |