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authorRong Wang <Rong.Wang@csr.com>2013-09-29 16:27:59 +0200
committerLinus Walleij <linus.walleij@linaro.org>2013-10-08 10:19:26 +0200
commit6a08a92ec45782e5543addf5f8785e2560a078f6 (patch)
treee5844fb3b5f3913e0a1f1c17790eebcf987a5540 /arch/mips/kernel/time.c
parentpinctrl: sirf: add lost USP-based UART pin groups for prima2 (diff)
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pinctrl: sirf: add USB1/UART1 pinmux usb/uart share
dn and dp of USB1 can share with UART1(UART1 can route rx,tx to dn and dp pins of USB1). here we add this pinmux capability. USB1/UART1 mode selection has dedicated control register in RSC module, here we attach the register offset of private data of related pin groups. Signed-off-by: Rong Wang <Rong.Wang@csr.com> Signed-off-by: Barry Song <Baohua.Song@csr.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/mips/kernel/time.c')
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