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authorRalf Baechle <ralf@linux-mips.org>2007-06-20 23:27:10 +0200
committerRalf Baechle <ralf@linux-mips.org>2007-06-20 23:27:10 +0200
commit3b1d4ed5353af04d6aa20be2701727b9cdb2ac61 (patch)
treee4a3335c925abd933f1650e1ee4786e6bfad8f35 /arch/mips/kernel/time.c
parent[POWERPC] rheap - eliminates internal fragments caused by alignment (diff)
downloadlinux-3b1d4ed5353af04d6aa20be2701727b9cdb2ac61.tar.xz
linux-3b1d4ed5353af04d6aa20be2701727b9cdb2ac61.zip
[MIPS] Don't drag a platform specific header into generic arch code.
For some platforms it's definitions may conflict. So that's the one-liner. The rest is 10 square kilometers of collateral damage fixup this include used to paper over. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/time.c')
-rw-r--r--arch/mips/kernel/time.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/arch/mips/kernel/time.c b/arch/mips/kernel/time.c
index 7def1ff3da94..d48d1d5bea0a 100644
--- a/arch/mips/kernel/time.c
+++ b/arch/mips/kernel/time.c
@@ -200,10 +200,15 @@ EXPORT_SYMBOL(null_perf_irq);
EXPORT_SYMBOL(perf_irq);
/*
+ * Timer interrupt
+ */
+int cp0_compare_irq;
+
+/*
* Performance counter IRQ or -1 if shared with timer
*/
-int mipsxx_perfcount_irq;
-EXPORT_SYMBOL(mipsxx_perfcount_irq);
+int cp0_perfcount_irq;
+EXPORT_SYMBOL_GPL(cp0_perfcount_irq);
/*
* Possibly handle a performance counter interrupt.
@@ -213,12 +218,12 @@ static inline int handle_perf_irq (int r2)
{
/*
* The performance counter overflow interrupt may be shared with the
- * timer interrupt (mipsxx_perfcount_irq < 0). If it is and a
+ * timer interrupt (cp0_perfcount_irq < 0). If it is and a
* performance counter has overflowed (perf_irq() == IRQ_HANDLED)
* and we can't reliably determine if a counter interrupt has also
* happened (!r2) then don't check for a timer interrupt.
*/
- return (mipsxx_perfcount_irq < 0) &&
+ return (cp0_perfcount_irq < 0) &&
perf_irq() == IRQ_HANDLED &&
!r2;
}