diff options
author | David Daney <ddaney@caviumnetworks.com> | 2009-05-14 00:59:56 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2009-06-17 12:06:31 +0200 |
commit | 4bb1a1089e321d685967032497f4363081eab3a9 (patch) | |
tree | da76ef126512ac9c13bedf21c9f6e6538d860bbc /arch/mips/kernel/traps.c | |
parent | MIPS: Allow CPU specific overriding of CP0 hwrena impl bits. (diff) | |
download | linux-4bb1a1089e321d685967032497f4363081eab3a9.tar.xz linux-4bb1a1089e321d685967032497f4363081eab3a9.zip |
MIPS: Move Cavium CP0 hwrena impl bits to cpu-feature-overrides.h
We had an ugly #ifdef for Cavium Octeon hwrena bits in traps.c, remove
it to mach-cavium-octeon/cpu-feature-overrides.h
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel/traps.c')
-rw-r--r-- | arch/mips/kernel/traps.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index f54871797ab9..08f1edf355e8 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1510,10 +1510,6 @@ void __cpuinit per_cpu_trap_init(void) write_c0_hwrena(enable); } -#ifdef CONFIG_CPU_CAVIUM_OCTEON - write_c0_hwrena(0xc000000f); /* Octeon has register 30 and 31 */ -#endif - #ifdef CONFIG_MIPS_MT_SMTC if (!secondaryTC) { #endif /* CONFIG_MIPS_MT_SMTC */ |