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| author | Mark Brown <broonie@kernel.org> | 2020-10-06 17:19:24 +0200 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2020-10-06 17:19:24 +0200 |
| commit | fd6b519a30a7179026d22c98d6bf10bb5ca8ca27 (patch) | |
| tree | e4a6bc4d8548a5b8db7148a18eb257b84e72d48b /arch/mips/kernel/traps.c | |
| parent | Merge series "ASoC: Intel: Remove obsolete solutions and components" from Cez... (diff) | |
| parent | Linux 5.9-rc5 (diff) | |
| download | linux-fd6b519a30a7179026d22c98d6bf10bb5ca8ca27.tar.xz linux-fd6b519a30a7179026d22c98d6bf10bb5ca8ca27.zip | |
Merge tag 'v5.9-rc5' into asoc-5.10
Linux 5.9-rc5
Diffstat (limited to 'arch/mips/kernel/traps.c')
| -rw-r--r-- | arch/mips/kernel/traps.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 38aa07ccdbcc..cf788591f091 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -1287,6 +1287,18 @@ static int enable_restore_fp_context(int msa) err = own_fpu_inatomic(1); if (msa && !err) { enable_msa(); + /* + * with MSA enabled, userspace can see MSACSR + * and MSA regs, but the values in them are from + * other task before current task, restore them + * from saved fp/msa context + */ + write_msa_csr(current->thread.fpu.msacsr); + /* + * own_fpu_inatomic(1) just restore low 64bit, + * fix the high 64bit + */ + init_msa_upper(); set_thread_flag(TIF_USEDMSA); set_thread_flag(TIF_MSA_CTX_LIVE); } |