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authorDavid Daney <ddaney@caviumnetworks.com>2010-02-11 00:12:48 +0100
committerRalf Baechle <ralf@linux-mips.org>2010-02-27 12:53:26 +0100
commit6f329468f3086e9d8f3832930fdb09ab3769176b (patch)
treed77b274399cf101fba59b0de01fd9491b4e28fee /arch/mips/kernel
parentMIPS: Implement Read Inhibit/eXecute Inhibit (diff)
downloadlinux-6f329468f3086e9d8f3832930fdb09ab3769176b.tar.xz
linux-6f329468f3086e9d8f3832930fdb09ab3769176b.zip
MIPS: Give Octeon+ CPUs their own cputype.
This allows us to treat them differently at runtime. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/951/ Patchwork: http://patchwork.linux-mips.org/patch/987/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/cpu-probe.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 9ea5ca89e85f..be5bb16be4e0 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -162,6 +162,7 @@ void __init check_wait(void)
case CPU_BCM6348:
case CPU_BCM6358:
case CPU_CAVIUM_OCTEON:
+ case CPU_CAVIUM_OCTEON_PLUS:
cpu_wait = r4k_wait;
break;
@@ -911,12 +912,16 @@ static inline void cpu_probe_cavium(struct cpuinfo_mips *c, unsigned int cpu)
case PRID_IMP_CAVIUM_CN38XX:
case PRID_IMP_CAVIUM_CN31XX:
case PRID_IMP_CAVIUM_CN30XX:
+ c->cputype = CPU_CAVIUM_OCTEON;
+ __cpu_name[cpu] = "Cavium Octeon";
+ goto platform;
case PRID_IMP_CAVIUM_CN58XX:
case PRID_IMP_CAVIUM_CN56XX:
case PRID_IMP_CAVIUM_CN50XX:
case PRID_IMP_CAVIUM_CN52XX:
- c->cputype = CPU_CAVIUM_OCTEON;
- __cpu_name[cpu] = "Cavium Octeon";
+ c->cputype = CPU_CAVIUM_OCTEON_PLUS;
+ __cpu_name[cpu] = "Cavium Octeon+";
+platform:
if (cpu == 0)
__elf_platform = "octeon";
break;