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author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2007-01-07 18:14:29 +0100 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2007-02-06 17:53:08 +0100 |
commit | 97dcb82de6cc99a5669eb8e342efc24cceb1e77e (patch) | |
tree | e195fd57deda8d38652c746c04a7c374cdf951a0 /arch/mips/kernel | |
parent | [MIPS] Remove unused rm9k_cpu_irq_disable() (diff) | |
download | linux-97dcb82de6cc99a5669eb8e342efc24cceb1e77e.tar.xz linux-97dcb82de6cc99a5669eb8e342efc24cceb1e77e.zip |
[MIPS] Define MIPS_CPU_IRQ_BASE in generic header
The irq_base for {mips,rm7k,rm9k}_cpu_irq_init() are constant on all
platforms and are same value on most platforms (0 or 16, depends on
CONFIG_I8259). Define them in asm-mips/mach-generic/irq.h and make
them customizable. This will save a few cycle on each CPU interrupt.
A good side effect is removing some dependencies to MALTA in generic
SMTC code.
Although MIPS_CPU_IRQ_BASE is customizable, this patch changes irq
mappings on DDB5477, EMMA2RH and MIPS_SIM, since really customizing
them might cause some header dependency problem and there seems no
good reason to customize it. So currently only VR41XX is using custom
MIPS_CPU_IRQ_BASE value, which is 0 regardless of CONFIG_I8259.
Testing this patch on those platforms is greatly appreciated. Thank
you.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r-- | arch/mips/kernel/irq-rm7000.c | 11 | ||||
-rw-r--r-- | arch/mips/kernel/irq-rm9000.c | 11 | ||||
-rw-r--r-- | arch/mips/kernel/irq_cpu.c | 17 | ||||
-rw-r--r-- | arch/mips/kernel/rtlx.c | 4 | ||||
-rw-r--r-- | arch/mips/kernel/smp-mt.c | 9 | ||||
-rw-r--r-- | arch/mips/kernel/smtc.c | 12 |
6 files changed, 22 insertions, 42 deletions
diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c index 123324ba8c14..a60cfe5f4d18 100644 --- a/arch/mips/kernel/irq-rm7000.c +++ b/arch/mips/kernel/irq-rm7000.c @@ -17,16 +17,14 @@ #include <asm/mipsregs.h> #include <asm/system.h> -static int irq_base; - static inline void unmask_rm7k_irq(unsigned int irq) { - set_c0_intcontrol(0x100 << (irq - irq_base)); + set_c0_intcontrol(0x100 << (irq - RM7K_CPU_IRQ_BASE)); } static inline void mask_rm7k_irq(unsigned int irq) { - clear_c0_intcontrol(0x100 << (irq - irq_base)); + clear_c0_intcontrol(0x100 << (irq - RM7K_CPU_IRQ_BASE)); } static struct irq_chip rm7k_irq_controller = { @@ -37,8 +35,9 @@ static struct irq_chip rm7k_irq_controller = { .unmask = unmask_rm7k_irq, }; -void __init rm7k_cpu_irq_init(int base) +void __init rm7k_cpu_irq_init(void) { + int base = RM7K_CPU_IRQ_BASE; int i; clear_c0_intcontrol(0x00000f00); /* Mask all */ @@ -46,6 +45,4 @@ void __init rm7k_cpu_irq_init(int base) for (i = base; i < base + 4; i++) set_irq_chip_and_handler(i, &rm7k_irq_controller, handle_level_irq); - - irq_base = base; } diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c index 2e68e4b639f7..27886db89a65 100644 --- a/arch/mips/kernel/irq-rm9000.c +++ b/arch/mips/kernel/irq-rm9000.c @@ -18,16 +18,14 @@ #include <asm/mipsregs.h> #include <asm/system.h> -static int irq_base; - static inline void unmask_rm9k_irq(unsigned int irq) { - set_c0_intcontrol(0x1000 << (irq - irq_base)); + set_c0_intcontrol(0x1000 << (irq - RM9K_CPU_IRQ_BASE)); } static inline void mask_rm9k_irq(unsigned int irq) { - clear_c0_intcontrol(0x1000 << (irq - irq_base)); + clear_c0_intcontrol(0x1000 << (irq - RM9K_CPU_IRQ_BASE)); } static inline void rm9k_cpu_irq_enable(unsigned int irq) @@ -93,8 +91,9 @@ unsigned int rm9000_perfcount_irq; EXPORT_SYMBOL(rm9000_perfcount_irq); -void __init rm9k_cpu_irq_init(int base) +void __init rm9k_cpu_irq_init(void) { + int base = RM9K_CPU_IRQ_BASE; int i; clear_c0_intcontrol(0x0000f000); /* Mask all */ @@ -106,6 +105,4 @@ void __init rm9k_cpu_irq_init(int base) rm9000_perfcount_irq = base + 1; set_irq_chip_and_handler(rm9000_perfcount_irq, &rm9k_perfcounter_irq, handle_level_irq); - - irq_base = base; } diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c index fcc86b96ccf6..6e73ddaeae74 100644 --- a/arch/mips/kernel/irq_cpu.c +++ b/arch/mips/kernel/irq_cpu.c @@ -25,7 +25,7 @@ * Don't even think about using this on SMP. You have been warned. * * This file exports one global function: - * void mips_cpu_irq_init(int irq_base); + * void mips_cpu_irq_init(void); */ #include <linux/init.h> #include <linux/interrupt.h> @@ -36,17 +36,15 @@ #include <asm/mipsmtregs.h> #include <asm/system.h> -static int mips_cpu_irq_base; - static inline void unmask_mips_irq(unsigned int irq) { - set_c0_status(0x100 << (irq - mips_cpu_irq_base)); + set_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE)); irq_enable_hazard(); } static inline void mask_mips_irq(unsigned int irq) { - clear_c0_status(0x100 << (irq - mips_cpu_irq_base)); + clear_c0_status(0x100 << (irq - MIPS_CPU_IRQ_BASE)); irq_disable_hazard(); } @@ -70,7 +68,7 @@ static unsigned int mips_mt_cpu_irq_startup(unsigned int irq) { unsigned int vpflags = dvpe(); - clear_c0_cause(0x100 << (irq - mips_cpu_irq_base)); + clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE)); evpe(vpflags); unmask_mips_mt_irq(irq); @@ -84,7 +82,7 @@ static unsigned int mips_mt_cpu_irq_startup(unsigned int irq) static void mips_mt_cpu_irq_ack(unsigned int irq) { unsigned int vpflags = dvpe(); - clear_c0_cause(0x100 << (irq - mips_cpu_irq_base)); + clear_c0_cause(0x100 << (irq - MIPS_CPU_IRQ_BASE)); evpe(vpflags); mask_mips_mt_irq(irq); } @@ -99,8 +97,9 @@ static struct irq_chip mips_mt_cpu_irq_controller = { .eoi = unmask_mips_mt_irq, }; -void __init mips_cpu_irq_init(int irq_base) +void __init mips_cpu_irq_init(void) { + int irq_base = MIPS_CPU_IRQ_BASE; int i; /* Mask interrupts. */ @@ -118,6 +117,4 @@ void __init mips_cpu_irq_init(int irq_base) for (i = irq_base + 2; i < irq_base + 8; i++) set_irq_chip_and_handler(i, &mips_cpu_irq_controller, handle_level_irq); - - mips_cpu_irq_base = irq_base; } diff --git a/arch/mips/kernel/rtlx.c b/arch/mips/kernel/rtlx.c index 5a99e3e0c96d..8610f4a925e9 100644 --- a/arch/mips/kernel/rtlx.c +++ b/arch/mips/kernel/rtlx.c @@ -63,7 +63,7 @@ extern void *vpe_get_shared(int index); static void rtlx_dispatch(void) { - do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_RTLX_IRQ); + do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_RTLX_IRQ); } @@ -491,7 +491,7 @@ static struct irqaction rtlx_irq = { .name = "RTLX", }; -static int rtlx_irq_num = MIPSCPU_INT_BASE + MIPS_CPU_RTLX_IRQ; +static int rtlx_irq_num = MIPS_CPU_IRQ_BASE + MIPS_CPU_RTLX_IRQ; static char register_chrdev_failed[] __initdata = KERN_ERR "rtlx_module_init: unable to register device\n"; diff --git a/arch/mips/kernel/smp-mt.c b/arch/mips/kernel/smp-mt.c index 1ee689c0e0c9..64b62bdfb4f6 100644 --- a/arch/mips/kernel/smp-mt.c +++ b/arch/mips/kernel/smp-mt.c @@ -35,7 +35,6 @@ #include <asm/mipsregs.h> #include <asm/mipsmtregs.h> #include <asm/mips_mt.h> -#include <asm/mips-boards/maltaint.h> /* This is f*cking wrong */ #define MIPS_CPU_IPI_RESCHED_IRQ 0 #define MIPS_CPU_IPI_CALL_IRQ 1 @@ -108,12 +107,12 @@ void __init sanitize_tlb_entries(void) static void ipi_resched_dispatch(void) { - do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ); + do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ); } static void ipi_call_dispatch(void) { - do_IRQ(MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ); + do_IRQ(MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ); } static irqreturn_t ipi_resched_interrupt(int irq, void *dev_id) @@ -270,8 +269,8 @@ void __init plat_prepare_cpus(unsigned int max_cpus) set_vi_handler(MIPS_CPU_IPI_CALL_IRQ, ipi_call_dispatch); } - cpu_ipi_resched_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_RESCHED_IRQ; - cpu_ipi_call_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_CALL_IRQ; + cpu_ipi_resched_irq = MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_RESCHED_IRQ; + cpu_ipi_call_irq = MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_CALL_IRQ; setup_irq(cpu_ipi_resched_irq, &irq_resched); setup_irq(cpu_ipi_call_irq, &irq_call); diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index 6a857bf030b0..6a2763143771 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c @@ -26,16 +26,6 @@ * This file should be built into the kernel only if CONFIG_MIPS_MT_SMTC is set. */ -/* - * MIPSCPU_INT_BASE is identically defined in both - * asm-mips/mips-boards/maltaint.h and asm-mips/mips-boards/simint.h, - * but as yet there's no properly organized include structure that - * will ensure that the right *int.h file will be included for a - * given platform build. - */ - -#define MIPSCPU_INT_BASE 16 - #define MIPS_CPU_IPI_IRQ 1 #define LOCK_MT_PRA() \ @@ -921,7 +911,7 @@ void smtc_timer_broadcast(int vpe) * interrupts. */ -static int cpu_ipi_irq = MIPSCPU_INT_BASE + MIPS_CPU_IPI_IRQ; +static int cpu_ipi_irq = MIPS_CPU_IRQ_BASE + MIPS_CPU_IPI_IRQ; static irqreturn_t ipi_interrupt(int irq, void *dev_idm) { |