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authorDavid Daney <ddaney@caviumnetworks.com>2008-10-14 01:36:13 +0200
committerRalf Baechle <ralf@linux-mips.org>2008-10-15 13:46:50 +0200
commit2dbac10263b2f3c561de68b4c369bc679352ccee (patch)
tree22e73fbdfadcc492b4aab4585788a712aa2598c9 /arch/mips/kernel
parentMIPS: show_cpuinfo prints the type of the calling CPU (diff)
downloadlinux-2dbac10263b2f3c561de68b4c369bc679352ccee.tar.xz
linux-2dbac10263b2f3c561de68b4c369bc679352ccee.zip
MIPS: Align .data.cacheline_aligned based on CONFIG_MIPS_L1_CACHE_SHIFT
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/vmlinux.lds.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S
index afb119f35682..58738c8d754f 100644
--- a/arch/mips/kernel/vmlinux.lds.S
+++ b/arch/mips/kernel/vmlinux.lds.S
@@ -104,7 +104,7 @@ SECTIONS
. = ALIGN(_PAGE_SIZE);
__nosave_end = .;
- . = ALIGN(32);
+ . = ALIGN(1 << CONFIG_MIPS_L1_CACHE_SHIFT);
.data.cacheline_aligned : {
*(.data.cacheline_aligned)
}