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author | Paul Burton <paul.burton@mips.com> | 2019-10-01 23:53:39 +0200 |
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committer | Paul Burton <paul.burton@mips.com> | 2019-10-07 18:43:05 +0200 |
commit | e84957e6ae043bb83ad6ae7e949a1ce97b6bbfef (patch) | |
tree | 362a1ddeb8bf9224c737e9c5f21284595a9abaf8 /arch/mips/kernel | |
parent | MIPS: futex: Emit Loongson3 sync workarounds within asm (diff) | |
download | linux-e84957e6ae043bb83ad6ae7e949a1ce97b6bbfef.tar.xz linux-e84957e6ae043bb83ad6ae7e949a1ce97b6bbfef.zip |
MIPS: syscall: Emit Loongson3 sync workarounds within asm
Generate the sync instructions required to workaround Loongson3 LL/SC
errata within inline asm blocks, which feels a little safer than doing
it from C where strictly speaking the compiler would be well within its
rights to insert a memory access between the separate asm statements we
previously had, containing sync & ll instructions respectively.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Cc: Huacai Chen <chenhc@lemote.com>
Cc: Jiaxun Yang <jiaxun.yang@flygoat.com>
Cc: linux-kernel@vger.kernel.org
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r-- | arch/mips/kernel/syscall.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c index 3f16f3823031..c333e5788664 100644 --- a/arch/mips/kernel/syscall.c +++ b/arch/mips/kernel/syscall.c @@ -37,6 +37,7 @@ #include <asm/signal.h> #include <asm/sim.h> #include <asm/shmparam.h> +#include <asm/sync.h> #include <asm/sysmips.h> #include <asm/switch_to.h> @@ -133,12 +134,12 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new) [efault] "i" (-EFAULT) : "memory"); } else if (cpu_has_llsc) { - loongson_llsc_mb(); __asm__ __volatile__ ( " .set push \n" " .set "MIPS_ISA_ARCH_LEVEL" \n" " li %[err], 0 \n" "1: \n" + " " __SYNC(full, loongson3_war) " \n" user_ll("%[old]", "(%[addr])") " move %[tmp], %[new] \n" "2: \n" |