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authorMaxime Bizon <mbizon@freebox.fr>2009-08-18 14:23:37 +0200
committerRalf Baechle <ralf@linux-mips.org>2009-09-17 20:07:52 +0200
commit0de663ef8627f35fda9106a8faaca512f29e493e (patch)
tree99e6b080199dae6ee2ced2edb91c5e29b1298c2f /arch/mips/kernel
parentMIPS: Octeon: Move some platform device registration to its own file. (diff)
downloadlinux-0de663ef8627f35fda9106a8faaca512f29e493e.tar.xz
linux-0de663ef8627f35fda9106a8faaca512f29e493e.zip
MIPS: BCM63xx: Add Broadcom 63xx CPU definitions.
Todo: Nothing ever detects CPU_BCM6338 but the code tests for it anyway. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/cpu-probe.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 4579d5c12da9..f709657e4dcd 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -156,6 +156,9 @@ void __init check_wait(void)
case CPU_25KF:
case CPU_PR4450:
case CPU_BCM3302:
+ case CPU_BCM6338:
+ case CPU_BCM6348:
+ case CPU_BCM6358:
case CPU_CAVIUM_OCTEON:
cpu_wait = r4k_wait;
break;
@@ -854,6 +857,7 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
decode_configs(c);
switch (c->processor_id & 0xff00) {
case PRID_IMP_BCM3302:
+ /* same as PRID_IMP_BCM6338 */
c->cputype = CPU_BCM3302;
__cpu_name[cpu] = "Broadcom BCM3302";
break;
@@ -861,6 +865,25 @@ static inline void cpu_probe_broadcom(struct cpuinfo_mips *c, unsigned int cpu)
c->cputype = CPU_BCM4710;
__cpu_name[cpu] = "Broadcom BCM4710";
break;
+ case PRID_IMP_BCM6345:
+ c->cputype = CPU_BCM6345;
+ __cpu_name[cpu] = "Broadcom BCM6345";
+ break;
+ case PRID_IMP_BCM6348:
+ c->cputype = CPU_BCM6348;
+ __cpu_name[cpu] = "Broadcom BCM6348";
+ break;
+ case PRID_IMP_BCM4350:
+ switch (c->processor_id & 0xf0) {
+ case PRID_REV_BCM6358:
+ c->cputype = CPU_BCM6358;
+ __cpu_name[cpu] = "Broadcom BCM6358";
+ break;
+ default:
+ c->cputype = CPU_UNKNOWN;
+ break;
+ }
+ break;
}
}