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| author | Markos Chandras <markos.chandras@imgtec.com> | 2015-07-01 10:13:32 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2015-07-09 11:15:44 +0200 |
| commit | 717f14255a52ad445d6f0eca7d0f22f59d6ba1f8 (patch) | |
| tree | 6ebc1b4d1209da39e418830f81b3d6fd5b6d1920 /arch/mips/kernel | |
| parent | MIPS: kernel: cps-vec: Use ta0-ta3 pseudo-registers for 64-bit (diff) | |
| download | linux-717f14255a52ad445d6f0eca7d0f22f59d6ba1f8.tar.xz linux-717f14255a52ad445d6f0eca7d0f22f59d6ba1f8.zip | |
MIPS: kernel: cps-vec: Replace KSEG0 with CKSEG0
In preparation for 64-bit CPS support, we replace KSEG0 with CKSEG0
so 64-bit kernels can be supported.
Cc: <stable@vger.kernel.org> # 3.16+
Reviewed-by: Paul Burton <paul.burton@imgtec.com>
Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/10590/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/kernel')
| -rw-r--r-- | arch/mips/kernel/cps-vec.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S index 21f714a81ebd..2f95568e0da5 100644 --- a/arch/mips/kernel/cps-vec.S +++ b/arch/mips/kernel/cps-vec.S @@ -107,7 +107,7 @@ not_nmi: mul t1, t1, t0 mul t1, t1, t2 - li a0, KSEG0 + li a0, CKSEG0 add a1, a0, t1 1: cache Index_Store_Tag_I, 0(a0) add a0, a0, t0 @@ -134,7 +134,7 @@ icache_done: mul t1, t1, t0 mul t1, t1, t2 - li a0, KSEG0 + li a0, CKSEG0 addu a1, a0, t1 subu a1, a1, t0 1: cache Index_Store_Tag_D, 0(a0) |