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authorMarkos Chandras <markos.chandras@imgtec.com>2014-11-26 16:43:11 +0100
committerMarkos Chandras <markos.chandras@imgtec.com>2015-02-17 16:37:35 +0100
commit84fef630127aa90ef547ddd018d3dc47b1e79a1e (patch)
tree0331c9646f7c6b25aeb46e0fcece9046d420a1d1 /arch/mips/kernel
parentMIPS: Emulate the new MIPS R6 BNVC, BNEC and BNEZLAC instructions (diff)
downloadlinux-84fef630127aa90ef547ddd018d3dc47b1e79a1e.tar.xz
linux-84fef630127aa90ef547ddd018d3dc47b1e79a1e.zip
MIPS: Emulate the new MIPS R6 BALC instruction
MIPS R6 uses the <R6 swc2 opcode for the new BALC instructions. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Diffstat (limited to 'arch/mips/kernel')
-rw-r--r--arch/mips/kernel/branch.c10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index 37c752757346..1f28724d23e5 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -789,6 +789,16 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
}
regs->cp0_epc += 8;
break;
+ case balc6_op:
+ if (!cpu_has_mips_r6) {
+ ret = -SIGILL;
+ break;
+ }
+ /* Compact branch: BALC */
+ regs->regs[31] = epc + 4;
+ epc += 4 + (insn.i_format.simmediate << 2);
+ regs->cp0_epc = epc;
+ break;
#endif
case cbcond0_op:
case cbcond1_op: