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authorThomas Gleixner <tglx@linutronix.de>2015-12-19 12:13:02 +0100
committerThomas Gleixner <tglx@linutronix.de>2015-12-19 12:13:02 +0100
commitef0bf620e9b81845368b9c72ffdbd6834e424526 (patch)
tree7862e4ca1aa61a20f8e11502276b7f8633a39aa4 /arch/mips/kvm/emulate.c
parentgenirq: Free irq_desc with rcu (diff)
parentirqchip/mbigen: Implement the mbigen irq chip operation functions (diff)
downloadlinux-ef0bf620e9b81845368b9c72ffdbd6834e424526.tar.xz
linux-ef0bf620e9b81845368b9c72ffdbd6834e424526.zip
Merge branch 'irq/wire-msi-bridge' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core
Pull the MSI wire bridge implementation from Marc Zyngier along with the first user of it. This is infrastructure to support a wired interrupt to MSI interrupt brigde. The first user is mbigen found in Hisilicon ARM SoCs.
Diffstat (limited to 'arch/mips/kvm/emulate.c')
-rw-r--r--arch/mips/kvm/emulate.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kvm/emulate.c b/arch/mips/kvm/emulate.c
index d5fa3eaf39a1..41b1b090f56f 100644
--- a/arch/mips/kvm/emulate.c
+++ b/arch/mips/kvm/emulate.c
@@ -1581,7 +1581,7 @@ enum emulation_result kvm_mips_emulate_cache(uint32_t inst, uint32_t *opc,
base = (inst >> 21) & 0x1f;
op_inst = (inst >> 16) & 0x1f;
- offset = inst & 0xffff;
+ offset = (int16_t)inst;
cache = (inst >> 16) & 0x3;
op = (inst >> 18) & 0x7;