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author | Linus Torvalds <torvalds@linux-foundation.org> | 2024-01-17 20:20:50 +0100 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2024-01-17 20:20:50 +0100 |
commit | 096f286ee3fadf3f6777dedba35fa66654ec9f34 (patch) | |
tree | a94596fac5e6cc0dc256fb0a23fb9b79f1319ecf /arch/mips/kvm/emulate.c | |
parent | Merge tag 'riscv-for-linus-6.8-mw1' of git://git.kernel.org/pub/scm/linux/ker... (diff) | |
parent | MIPS: Alchemy: Fix an out-of-bound access in db1550_dev_setup() (diff) | |
download | linux-096f286ee3fadf3f6777dedba35fa66654ec9f34.tar.xz linux-096f286ee3fadf3f6777dedba35fa66654ec9f34.zip |
Merge tag 'mips_6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Thomas Bogendoerfer:
"Just cleanups and fixes"
* tag 'mips_6.8' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
MIPS: Alchemy: Fix an out-of-bound access in db1550_dev_setup()
MIPS: Alchemy: Fix an out-of-bound access in db1200_dev_setup()
MIPS: Fix typos
MIPS: Remove unused shadow GPR support from vector irq setup
MIPS: Allow vectored interrupt handler to reside everywhere for 64bit
mips: Set dump-stack arch description
mips: mm: add slab availability checking in ioremap_prot
mips: Optimize max_mapnr init procedure
mips: Fix max_mapnr being uninitialized on early stages
mips: Fix incorrect max_low_pfn adjustment
mips: dmi: Fix early remap on MIPS32
MIPS: compressed: Use correct instruction for 64 bit code
MIPS: SGI-IP27: hubio: fix nasid kernel-doc warning
MAINTAINERS: Add myself as maintainer of the Ralink architecture
Diffstat (limited to 'arch/mips/kvm/emulate.c')
-rw-r--r-- | arch/mips/kvm/emulate.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/kvm/emulate.c b/arch/mips/kvm/emulate.c index e64372b8f66a..0feec52222fb 100644 --- a/arch/mips/kvm/emulate.c +++ b/arch/mips/kvm/emulate.c @@ -531,7 +531,7 @@ static void kvm_mips_resume_hrtimer(struct kvm_vcpu *vcpu, * to be used for a period of time, but the exact ktime corresponding to the * final Count that must be restored is not known. * - * It is gauranteed that a timer interrupt immediately after restore will be + * It is guaranteed that a timer interrupt immediately after restore will be * handled, but not if CP0_Compare is exactly at @count. That case should * already be handled when the hardware timer state is saved. * |