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| author | John Crispin <blogic@openwrt.org> | 2012-11-09 13:43:30 +0100 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2012-11-11 18:47:35 +0100 |
| commit | af14a456c58c153c6d761e6c0af48157692b52ad (patch) | |
| tree | 15256dca6cca0566f6fa3ca766a7572c627cef97 /arch/mips/lantiq/Kconfig | |
| parent | MIPS: lantiq: adds xrx200 ethernet clock definition (diff) | |
| download | linux-af14a456c58c153c6d761e6c0af48157692b52ad.tar.xz linux-af14a456c58c153c6d761e6c0af48157692b52ad.zip | |
MIPS: lantiq: adds code for booting GPHY
The XRX200 family of SoCs has embedded gigabit PHYs. This patch adds code to
boot them up.
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4522
Diffstat (limited to 'arch/mips/lantiq/Kconfig')
0 files changed, 0 insertions, 0 deletions