diff options
| author | Hauke Mehrtens <hauke.mehrtens@lantiq.com> | 2015-10-28 23:37:33 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2015-11-11 08:37:06 +0100 |
| commit | 18a3af60fcb6c0f2948e4e2922d3fcaeb1d74c64 (patch) | |
| tree | d7196f1804217256c663070a3c9f656b8d3de408 /arch/mips/lantiq/clk.h | |
| parent | MIPS: Lantiq: Rename CGU_SYS_VR9 register (diff) | |
| download | linux-18a3af60fcb6c0f2948e4e2922d3fcaeb1d74c64.tar.xz linux-18a3af60fcb6c0f2948e4e2922d3fcaeb1d74c64.zip | |
MIPS: Lantiq: Fix pp32 clock on vr9
The vendor code uses different clock values for this clock.
Signed-off-by: Hauke Mehrtens <hauke.mehrtens@lantiq.com>
Acked-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11384/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/lantiq/clk.h')
| -rw-r--r-- | arch/mips/lantiq/clk.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/lantiq/clk.h b/arch/mips/lantiq/clk.h index 77e4bdb1fe8c..101afcbbfece 100644 --- a/arch/mips/lantiq/clk.h +++ b/arch/mips/lantiq/clk.h @@ -31,10 +31,12 @@ #define CLOCK_240M 240000000 #define CLOCK_250M 250000000 #define CLOCK_266M 266666666 +#define CLOCK_288M 288888888 #define CLOCK_300M 300000000 #define CLOCK_333M 333333333 #define CLOCK_393M 393215332 #define CLOCK_400M 400000000 +#define CLOCK_432M 432000000 #define CLOCK_450M 450000000 #define CLOCK_500M 500000000 #define CLOCK_600M 600000000 |