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authorJohn Crispin <blogic@openwrt.org>2011-05-06 00:10:01 +0200
committerRalf Baechle <ralf@linux-mips.org>2011-05-19 10:55:43 +0200
commit504d4721ee8e432af4b5f196a08af38bc4dac5fe (patch)
tree964df243c11ce5d6ad6b839e1a205431b008c990 /arch/mips/lantiq/xway/devices.c
parentMIPS: Lantiq: Add DMA support (diff)
downloadlinux-504d4721ee8e432af4b5f196a08af38bc4dac5fe.tar.xz
linux-504d4721ee8e432af4b5f196a08af38bc4dac5fe.zip
MIPS: Lantiq: Add ethernet driver
This patch adds the driver for the ETOP Packet Processing Engine (PPE32) found inside the XWAY family of Lantiq MIPS SoCs. This driver makes 100MBit ethernet work. Support for all 8 dma channels, gbit and the embedded switch found on the ar9/vr9 still needs to be implemented. Signed-off-by: John Crispin <blogic@openwrt.org> Signed-off-by: Ralph Hempel <ralph.hempel@lantiq.com> Cc: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/2357/ Acked-by: David S. Miller <davem@davemloft.net> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/lantiq/xway/devices.c')
-rw-r--r--arch/mips/lantiq/xway/devices.c23
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/mips/lantiq/xway/devices.c b/arch/mips/lantiq/xway/devices.c
index a71b3b532a01..e09e789dfc27 100644
--- a/arch/mips/lantiq/xway/devices.c
+++ b/arch/mips/lantiq/xway/devices.c
@@ -96,3 +96,26 @@ void __init ltq_register_ase_asc(void)
platform_device_register_simple("ltq_asc", 0,
ltq_ase_asc_resources, ARRAY_SIZE(ltq_ase_asc_resources));
}
+
+/* ethernet */
+static struct resource ltq_etop_resources = {
+ .name = "etop",
+ .start = LTQ_ETOP_BASE_ADDR,
+ .end = LTQ_ETOP_BASE_ADDR + LTQ_ETOP_SIZE - 1,
+ .flags = IORESOURCE_MEM,
+};
+
+static struct platform_device ltq_etop = {
+ .name = "ltq_etop",
+ .resource = &ltq_etop_resources,
+ .num_resources = 1,
+};
+
+void __init
+ltq_register_etop(struct ltq_eth_data *eth)
+{
+ if (eth) {
+ ltq_etop.dev.platform_data = eth;
+ platform_device_register(&ltq_etop);
+ }
+}