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authorHauke Mehrtens <hauke@hauke-m.de>2017-08-20 00:18:22 +0200
committerRalf Baechle <ralf@linux-mips.org>2017-09-04 21:19:02 +0200
commitfe556cd86774388a82bc1ab1e2e3818ca87dd4d4 (patch)
tree745af8c7d27c0dca31e0c58b94d5513f41a63748 /arch/mips/lantiq
parentphy: Add an USB PHY driver for the Lantiq SoCs using the RCU module (diff)
downloadlinux-fe556cd86774388a82bc1ab1e2e3818ca87dd4d4.tar.xz
linux-fe556cd86774388a82bc1ab1e2e3818ca87dd4d4.zip
MIPS: lantiq: remove old USB PHY initialisation
This is now done in a PHY driver. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: martin.blumenstingl@googlemail.com Cc: john@phrozen.org Cc: robh@kernel.org Cc: andy.shevchenko@gmail.com Cc: p.zabel@pengutronix.de Cc: kishon@ti.com Cc: mark.rutland@arm.com Cc: linux-mips@linux-mips.org Cc: linux-mtd@lists.infradead.org Cc: linux-watchdog@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-spi@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/17130/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/lantiq')
-rw-r--r--arch/mips/lantiq/xway/reset.c43
1 files changed, 0 insertions, 43 deletions
diff --git a/arch/mips/lantiq/xway/reset.c b/arch/mips/lantiq/xway/reset.c
index be5fd29de523..04cd9a7c04a3 100644
--- a/arch/mips/lantiq/xway/reset.c
+++ b/arch/mips/lantiq/xway/reset.c
@@ -114,45 +114,6 @@ static void ltq_machine_power_off(void)
unreachable();
}
-static void ltq_usb_init(void)
-{
- /* Power for USB cores 1 & 2 */
- ltq_pmu_enable(PMU_AHBM);
- ltq_pmu_enable(PMU_USB0);
- ltq_pmu_enable(PMU_USB1);
-
- ltq_rcu_w32(ltq_rcu_r32(RCU_CFG1A) | BIT(0), RCU_CFG1A);
- ltq_rcu_w32(ltq_rcu_r32(RCU_CFG1B) | BIT(0), RCU_CFG1B);
-
- /* Enable USB PHY power for cores 1 & 2 */
- ltq_pmu_enable(PMU_USB0_P);
- ltq_pmu_enable(PMU_USB1_P);
-
- /* Configure cores to host mode */
- ltq_rcu_w32(ltq_rcu_r32(RCU_USB1CFG) & ~RCU_USBCFG_HDSEL_BIT,
- RCU_USB1CFG);
- ltq_rcu_w32(ltq_rcu_r32(RCU_USB2CFG) & ~RCU_USBCFG_HDSEL_BIT,
- RCU_USB2CFG);
-
- /* Select DMA endianness (Host-endian: big-endian) */
- ltq_rcu_w32((ltq_rcu_r32(RCU_USB1CFG) & ~RCU_USBCFG_SLV_END_BIT)
- | RCU_USBCFG_HOST_END_BIT, RCU_USB1CFG);
- ltq_rcu_w32(ltq_rcu_r32((RCU_USB2CFG) & ~RCU_USBCFG_SLV_END_BIT)
- | RCU_USBCFG_HOST_END_BIT, RCU_USB2CFG);
-
- /* Hard reset USB state machines */
- ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET) | USBRESET_BIT, RCU_USBRESET);
- udelay(50 * 1000);
- ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET) & ~USBRESET_BIT, RCU_USBRESET);
-
- /* Soft reset USB state machines */
- ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET2)
- | USB1RESET_BIT | USB2RESET_BIT, RCU_USBRESET2);
- udelay(50 * 1000);
- ltq_rcu_w32(ltq_rcu_r32(RCU_USBRESET2)
- & ~(USB1RESET_BIT | USB2RESET_BIT), RCU_USBRESET2);
-}
-
static int __init mips_reboot_setup(void)
{
struct resource res;
@@ -176,10 +137,6 @@ static int __init mips_reboot_setup(void)
if (!ltq_rcu_membase)
panic("Failed to remap core memory");
- if (of_machine_is_compatible("lantiq,ar9") ||
- of_machine_is_compatible("lantiq,vr9"))
- ltq_usb_init();
-
_machine_restart = ltq_machine_restart;
_machine_halt = ltq_machine_halt;
pm_power_off = ltq_machine_power_off;