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authorLinus Torvalds <torvalds@linux-foundation.org>2014-08-07 17:47:00 +0200
committerLinus Torvalds <torvalds@linux-foundation.org>2014-08-07 17:47:00 +0200
commite669830526a0abaf301bf408df69cde33901ac63 (patch)
tree0b6043375006d1754bbd1ab2370b0a0536546cc9 /arch/mips/loongson/loongson-3/smp.h
parentMerge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s39... (diff)
parentMerge branch '3.16-fixes' into mips-for-linux-next (diff)
downloadlinux-e669830526a0abaf301bf408df69cde33901ac63.tar.xz
linux-e669830526a0abaf301bf408df69cde33901ac63.zip
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus
Pull MIPS updates from Ralf Baechle: "This is the main pull request for 3.17. It contains: - misc Cavium Octeon, BCM47xx, BCM63xx and Alchemy updates - MIPS ptrace updates and cleanups - various fixes that will also go to -stable - a number of cleanups and small non-critical fixes. - NUMA support for the Loongson 3. - more support for MSA - support for MAAR - various FP enhancements and fixes" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (139 commits) MIPS: jz4740: remove unnecessary null test before debugfs_remove MIPS: Octeon: remove unnecessary null test before debugfs_remove_recursive MIPS: ZBOOT: implement stack protector in compressed boot phase MIPS: mipsreg: remove duplicate MIPS_CONF4_FTLBSETS_SHIFT MIPS: Bonito64: remove a duplicate define MIPS: Malta: initialise MAARs MIPS: Initialise MAARs MIPS: detect presence of MAARs MIPS: define MAAR register accessors & bits MIPS: mark MSA experimental MIPS: Don't build MSA support unless it can be used MIPS: consistently clear MSA flags when starting & copying threads MIPS: 16 byte align MSA vector context MIPS: disable preemption whilst initialising MSA MIPS: ensure MSA gets disabled during boot MIPS: fix read_msa_* & write_msa_* functions on non-MSA toolchains MIPS: fix MSA context for tasks which don't use FP first MIPS: init upper 64b of vector registers when MSA is first used MIPS: save/disable MSA in lose_fpu MIPS: preserve scalar FP CSR when switching vector context ...
Diffstat (limited to 'arch/mips/loongson/loongson-3/smp.h')
-rw-r--r--arch/mips/loongson/loongson-3/smp.h37
1 files changed, 19 insertions, 18 deletions
diff --git a/arch/mips/loongson/loongson-3/smp.h b/arch/mips/loongson/loongson-3/smp.h
index 3453e8c4f2f0..d98ff654b7d7 100644
--- a/arch/mips/loongson/loongson-3/smp.h
+++ b/arch/mips/loongson/loongson-3/smp.h
@@ -1,29 +1,30 @@
#ifndef __LOONGSON_SMP_H_
#define __LOONGSON_SMP_H_
-/* for Loongson-3A smp support */
+/* for Loongson-3 smp support */
+extern unsigned long long smp_group[4];
/* 4 groups(nodes) in maximum in numa case */
-#define SMP_CORE_GROUP0_BASE 0x900000003ff01000
-#define SMP_CORE_GROUP1_BASE 0x900010003ff01000
-#define SMP_CORE_GROUP2_BASE 0x900020003ff01000
-#define SMP_CORE_GROUP3_BASE 0x900030003ff01000
+#define SMP_CORE_GROUP0_BASE (smp_group[0])
+#define SMP_CORE_GROUP1_BASE (smp_group[1])
+#define SMP_CORE_GROUP2_BASE (smp_group[2])
+#define SMP_CORE_GROUP3_BASE (smp_group[3])
/* 4 cores in each group(node) */
-#define SMP_CORE0_OFFSET 0x000
-#define SMP_CORE1_OFFSET 0x100
-#define SMP_CORE2_OFFSET 0x200
-#define SMP_CORE3_OFFSET 0x300
+#define SMP_CORE0_OFFSET 0x000
+#define SMP_CORE1_OFFSET 0x100
+#define SMP_CORE2_OFFSET 0x200
+#define SMP_CORE3_OFFSET 0x300
/* ipi registers offsets */
-#define STATUS0 0x00
-#define EN0 0x04
-#define SET0 0x08
-#define CLEAR0 0x0c
-#define STATUS1 0x10
-#define MASK1 0x14
-#define SET1 0x18
-#define CLEAR1 0x1c
-#define BUF 0x20
+#define STATUS0 0x00
+#define EN0 0x04
+#define SET0 0x08
+#define CLEAR0 0x0c
+#define STATUS1 0x10
+#define MASK1 0x14
+#define SET1 0x18
+#define CLEAR1 0x1c
+#define BUF 0x20
#endif