diff options
author | Jiaxun Yang <jiaxun.yang@flygoat.com> | 2019-10-20 16:43:14 +0200 |
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committer | Paul Burton <paulburton@kernel.org> | 2019-11-01 22:30:52 +0100 |
commit | 71e2f4dd5a65bd8dbca0b77661e75eea471168f8 (patch) | |
tree | e7107d2996f7ba8ec282190a49c557598acd6f88 /arch/mips/loongson2ef/common/bonito-irq.c | |
parent | MIPS: Loongson64: Rename CPU TYPES (diff) | |
download | linux-71e2f4dd5a65bd8dbca0b77661e75eea471168f8.tar.xz linux-71e2f4dd5a65bd8dbca0b77661e75eea471168f8.zip |
MIPS: Fork loongson2ef from loongson64
As later model of GSx64 family processors including 2-series-soc have
similar design with initial loongson3a while loongson2e/f seems less
identical, we separate loongson2e/f support code out of mach-loongson64
to make our life easier.
This patch contains mostly file moving works.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
[paulburton@kernel.org: Squash in the MAINTAINERS updates]
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: paul.burton@mips.com
Diffstat (limited to 'arch/mips/loongson2ef/common/bonito-irq.c')
-rw-r--r-- | arch/mips/loongson2ef/common/bonito-irq.c | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/arch/mips/loongson2ef/common/bonito-irq.c b/arch/mips/loongson2ef/common/bonito-irq.c new file mode 100644 index 000000000000..82352cc25e4c --- /dev/null +++ b/arch/mips/loongson2ef/common/bonito-irq.c @@ -0,0 +1,49 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2001 MontaVista Software Inc. + * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net + * Copyright (C) 2000, 2001 Ralf Baechle (ralf@gnu.org) + * + * Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology + * Author: Fuxin Zhang, zhangfx@lemote.com + */ +#include <linux/interrupt.h> +#include <linux/compiler.h> + +#include <loongson.h> + +static inline void bonito_irq_enable(struct irq_data *d) +{ + LOONGSON_INTENSET = (1 << (d->irq - LOONGSON_IRQ_BASE)); + mmiowb(); +} + +static inline void bonito_irq_disable(struct irq_data *d) +{ + LOONGSON_INTENCLR = (1 << (d->irq - LOONGSON_IRQ_BASE)); + mmiowb(); +} + +static struct irq_chip bonito_irq_type = { + .name = "bonito_irq", + .irq_mask = bonito_irq_disable, + .irq_unmask = bonito_irq_enable, +}; + +static struct irqaction __maybe_unused dma_timeout_irqaction = { + .handler = no_action, + .name = "dma_timeout", +}; + +void bonito_irq_init(void) +{ + u32 i; + + for (i = LOONGSON_IRQ_BASE; i < LOONGSON_IRQ_BASE + 32; i++) + irq_set_chip_and_handler(i, &bonito_irq_type, + handle_level_irq); + +#ifdef CONFIG_CPU_LOONGSON2E + setup_irq(LOONGSON_IRQ_BASE + 10, &dma_timeout_irqaction); +#endif +} |