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authorYang Ling <gnaygnil@gmail.com>2016-12-04 15:57:03 +0100
committerRalf Baechle <ralf@linux-mips.org>2017-01-03 16:34:42 +0100
commite31e4505b2c944c4e4c30e5ed983966537c4632f (patch)
tree22fc7bb3026cd727966ac3e1351fc9ac39355dfe /arch/mips/loongson32
parentMIPS: Remove RESTORE_ALL_AND_RET (diff)
downloadlinux-e31e4505b2c944c4e4c30e5ed983966537c4632f.tar.xz
linux-e31e4505b2c944c4e4c30e5ed983966537c4632f.zip
MIPS: Loongson1: Remove several redundant RTC-related macros
Move the RTC-related macros to regs-rtc.h. Signed-off-by: Yang Ling <gnaygnil@gmail.com> Cc: keguang.zhang@gmail.com Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/14642/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/loongson32')
-rw-r--r--arch/mips/loongson32/common/platform.c27
1 files changed, 11 insertions, 16 deletions
diff --git a/arch/mips/loongson32/common/platform.c b/arch/mips/loongson32/common/platform.c
index beff0852c6a4..18c2959afe07 100644
--- a/arch/mips/loongson32/common/platform.c
+++ b/arch/mips/loongson32/common/platform.c
@@ -1,9 +1,9 @@
/*
* Copyright (c) 2011-2016 Zhang, Keguang <keguang.zhang@gmail.com>
*
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
@@ -23,10 +23,6 @@
#include <dma.h>
#include <nand.h>
-#define LS1X_RTC_CTRL ((void __iomem *)KSEG1ADDR(LS1X_RTC_BASE + 0x40))
-#define RTC_EXTCLK_OK (BIT(5) | BIT(8))
-#define RTC_EXTCLK_EN BIT(8)
-
/* 8250/16550 compatible UART */
#define LS1X_UART(_id) \
{ \
@@ -70,15 +66,6 @@ void __init ls1x_serial_set_uartclk(struct platform_device *pdev)
p->uartclk = clk_get_rate(clk);
}
-void __init ls1x_rtc_set_extclk(struct platform_device *pdev)
-{
- u32 val;
-
- val = __raw_readl(LS1X_RTC_CTRL);
- if (!(val & RTC_EXTCLK_OK))
- __raw_writel(val | RTC_EXTCLK_EN, LS1X_RTC_CTRL);
-}
-
/* CPUFreq */
static struct plat_ls1x_cpufreq ls1x_cpufreq_pdata = {
.clk_name = "cpu_clk",
@@ -357,6 +344,14 @@ struct platform_device ls1x_ehci_pdev = {
};
/* Real Time Clock */
+void __init ls1x_rtc_set_extclk(struct platform_device *pdev)
+{
+ u32 val = __raw_readl(LS1X_RTC_CTRL);
+
+ if (!(val & RTC_EXTCLK_OK))
+ __raw_writel(val | RTC_EXTCLK_EN, LS1X_RTC_CTRL);
+}
+
struct platform_device ls1x_rtc_pdev = {
.name = "ls1x-rtc",
.id = -1,