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authorPaul Burton <paul.burton@mips.com>2019-10-01 23:53:39 +0200
committerPaul Burton <paul.burton@mips.com>2019-10-07 18:43:05 +0200
commite84957e6ae043bb83ad6ae7e949a1ce97b6bbfef (patch)
tree362a1ddeb8bf9224c737e9c5f21284595a9abaf8 /arch/mips/loongson64
parentMIPS: futex: Emit Loongson3 sync workarounds within asm (diff)
downloadlinux-e84957e6ae043bb83ad6ae7e949a1ce97b6bbfef.tar.xz
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MIPS: syscall: Emit Loongson3 sync workarounds within asm
Generate the sync instructions required to workaround Loongson3 LL/SC errata within inline asm blocks, which feels a little safer than doing it from C where strictly speaking the compiler would be well within its rights to insert a memory access between the separate asm statements we previously had, containing sync & ll instructions respectively. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org Cc: Huacai Chen <chenhc@lemote.com> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: linux-kernel@vger.kernel.org
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