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| author | Tiezhu Yang <yangtiezhu@loongson.cn> | 2020-11-03 08:12:04 +0100 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-11-11 23:53:13 +0100 |
| commit | 381ad3843b26ec9b461e7973729ef64b36ed4627 (patch) | |
| tree | 9adc11a4903710b321516e37d721834a77509625 /arch/mips/loongson64 | |
| parent | MIPS: Loongson64: Add Mail_Send support for 3A4000+ CPU (diff) | |
| download | linux-381ad3843b26ec9b461e7973729ef64b36ed4627.tar.xz linux-381ad3843b26ec9b461e7973729ef64b36ed4627.zip | |
MIPS: Loongson64: SMP: Fix up play_dead jump indicator
In play_dead function, the whole 64-bit PC mailbox was used as a indicator
to determine if the master core had written boot jump information.
However, after we introduced CSR mailsend, the hardware will not guarante
an atomic write for the 64-bit PC mailbox. Thus we have to use the lower
32-bit which is written at the last as the jump indicator instead.
Signed-off-by: Lu Zeng <zenglu@loongson.cn>
Signed-off-by: Jun Yi <yijun@loongson.cn>
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/loongson64')
| -rw-r--r-- | arch/mips/loongson64/smp.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/loongson64/smp.c b/arch/mips/loongson64/smp.c index 736e98ddd596..aa0cd723e61d 100644 --- a/arch/mips/loongson64/smp.c +++ b/arch/mips/loongson64/smp.c @@ -764,9 +764,10 @@ static void loongson3_type3_play_dead(int *state_addr) "1: li %[count], 0x100 \n" /* wait for init loop */ "2: bnez %[count], 2b \n" /* limit mailbox access */ " addiu %[count], -1 \n" - " ld %[initfunc], 0x20(%[base]) \n" /* get PC via mailbox */ + " lw %[initfunc], 0x20(%[base]) \n" /* check lower 32-bit as jump indicator */ " beqz %[initfunc], 1b \n" " nop \n" + " ld %[initfunc], 0x20(%[base]) \n" /* get PC (whole 64-bit) via mailbox */ " ld $sp, 0x28(%[base]) \n" /* get SP via mailbox */ " ld $gp, 0x30(%[base]) \n" /* get GP via mailbox */ " ld $a1, 0x38(%[base]) \n" |