summaryrefslogtreecommitdiffstats
path: root/arch/mips/loongson
diff options
context:
space:
mode:
authorMaciej W. Rozycki <macro@linux-mips.org>2015-04-04 00:27:48 +0200
committerRalf Baechle <ralf@linux-mips.org>2015-04-08 01:10:37 +0200
commit9b26616c8d9dae53fbac7f7cb2c6dd1308102976 (patch)
treed4249bd953d4fa955cecd1283cc0f518df83f8a2 /arch/mips/loongson
parentMIPS: math-emu: Make ABS.fmt and NEG.fmt arithmetic again (diff)
downloadlinux-9b26616c8d9dae53fbac7f7cb2c6dd1308102976.tar.xz
linux-9b26616c8d9dae53fbac7f7cb2c6dd1308102976.zip
MIPS: Respect the ISA level in FCSR handling
Define the central place the default FCSR value is set from, initialised in `cpu_probe'. Determine the FCSR mask applied to values written to the register with CTC1 in the full emulation mode and via ptrace(2), according to the ISA level of processor hardware or the writability of bits 31:18 if actual FPU hardware is used. Software may rely on FCSR bits whose functions our emulator does not implement, so it should not allow them to be set or software may get confused. For ptrace(2) it's just sanity. [ralf@linux-mips.org: Fixed double inclusion of <asm/current.h>.] Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9711/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/loongson')
-rw-r--r--arch/mips/loongson/loongson-3/cop2-ex.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/loongson/loongson-3/cop2-ex.c b/arch/mips/loongson/loongson-3/cop2-ex.c
index b03e37d2071a..ea13764d0a03 100644
--- a/arch/mips/loongson/loongson-3/cop2-ex.c
+++ b/arch/mips/loongson/loongson-3/cop2-ex.c
@@ -43,7 +43,7 @@ static int loongson_cu2_call(struct notifier_block *nfb, unsigned long action,
if (!fpu_owned) {
set_thread_flag(TIF_USEDFPU);
if (!used_math()) {
- _init_fpu();
+ _init_fpu(current->thread.fpu.fcr31);
set_used_math();
} else
_restore_fp(current);