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authorMarkos Chandras <markos.chandras@imgtec.com>2014-11-27 10:32:25 +0100
committerMarkos Chandras <markos.chandras@imgtec.com>2015-02-17 16:37:35 +0100
commit69b9a2fd05a308b9b1e1f282f3b772491603c582 (patch)
tree15a949df838007dfa51396b0286e7e7547f072f3 /arch/mips/math-emu/cp1emu.c
parentMIPS: Emulate the new MIPS R6 BALC instruction (diff)
downloadlinux-69b9a2fd05a308b9b1e1f282f3b772491603c582.tar.xz
linux-69b9a2fd05a308b9b1e1f282f3b772491603c582.zip
MIPS: Emulate the new MIPS R6 BEQZC and JIC instructions
MIPS R6 uses the <R6 ldc2 opcode for the new BEQZC and JIC instructions Signed-off-by: Markos Chandras <markos.chandras@imgtec.com>
Diffstat (limited to '')
-rw-r--r--arch/mips/math-emu/cp1emu.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index d732100c99f0..f00af84f017d 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -679,6 +679,13 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
dec_insn.next_pc_inc;
return 1;
+ case beqzcjic_op:
+ if (!cpu_has_mips_r6)
+ break;
+ *contpc = regs->cp0_epc + dec_insn.pc_inc +
+ dec_insn.next_pc_inc;
+
+ return 1;
#endif
case cop0_op:
case cop1_op: