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authorShane McDonald <mcdonald.shane@gmail.com>2012-06-14 04:26:40 +0200
committerJohn Crispin <blogic@openwrt.org>2012-11-09 11:37:16 +0100
commitb5b64f2ba434cd2082a89aecec4b4c1eaec742c0 (patch)
tree0bdee1e4f388d0f358ac3fbd83dd2c075a2fd352 /arch/mips/mm/c-r4k.c
parentmips/octeon: 16-Bit NOR flash was not being detected during boot (diff)
downloadlinux-b5b64f2ba434cd2082a89aecec4b4c1eaec742c0.tar.xz
linux-b5b64f2ba434cd2082a89aecec4b4c1eaec742c0.zip
MIPS: Move processing of coherency kernel parameters earlier
Commit 97ce2c88f9ad42e3c60a9beb9fca87abf3639faa (jump-label: initialize jump-label subsystem much earlier) caused MIPS to break, so this was resolved with commit 6650df3c380e0db558dbfec63ed860402c6afb2a (MIPS: Move cache setup to setup_arch().). Unfortunately, after this commit, the coherency kernel parameters, cca and coherentio, are no longer processed before their values are used. This patch fixes this problem by marking them as early_param, which results in them being processed before they are needed. Signed-off-by: Shane McDonald <mcdonald.shane@gmail.com> Acked-by: David Daney <david.daney@cavium.com> Cc: Ralf Baechle <ralf@linux-mips.org> Patchwork: http://patchwork.linux-mips.org/patch/3961 Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/mm/c-r4k.c')
-rw-r--r--arch/mips/mm/c-r4k.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 4c32ede464b5..1d6fee48d0dd 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1348,10 +1348,10 @@ static int __init cca_setup(char *str)
{
get_option(&str, &cca);
- return 1;
+ return 0;
}
-__setup("cca=", cca_setup);
+early_param("cca", cca_setup);
static void __cpuinit coherency_setup(void)
{
@@ -1401,10 +1401,10 @@ static int __init setcoherentio(char *str)
{
coherentio = 1;
- return 1;
+ return 0;
}
-__setup("coherentio", setcoherentio);
+early_param("coherentio", setcoherentio);
#endif
static void __cpuinit r4k_cache_error_setup(void)