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authorThiemo Seufer <ths@networkno.de>2005-02-19 14:32:02 +0100
committerRalf Baechle <ralf@linux-mips.org>2005-10-29 20:30:38 +0200
commit26a51b270f6d87674b713705ba9533440ca41b6c (patch)
treee9ea5b928cf639000c5e6429e556ddd10260bf15 /arch/mips/mm/c-r4k.c
parentO2 doesn't have _that_ much RAM. (diff)
downloadlinux-26a51b270f6d87674b713705ba9533440ca41b6c.tar.xz
linux-26a51b270f6d87674b713705ba9533440ca41b6c.zip
Use intermediate variable.
Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm/c-r4k.c')
-rw-r--r--arch/mips/mm/c-r4k.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index 429167321cfb..03100b8a45d9 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -380,7 +380,7 @@ static inline void local_r4k_flush_cache_page(void *args)
* If ownes no valid ASID yet, cannot possibly have gotten
* this page into the cache.
*/
- if (cpu_context(smp_processor_id(), vma->vm_mm) == 0)
+ if (cpu_context(smp_processor_id(), mm) == 0)
return;
page &= PAGE_MASK;
@@ -428,8 +428,8 @@ static inline void local_r4k_flush_cache_page(void *args)
if (cpu_has_vtag_icache) {
int cpu = smp_processor_id();
- if (cpu_context(cpu, vma->vm_mm) != 0)
- drop_mmu_context(vma->vm_mm, cpu);
+ if (cpu_context(cpu, mm) != 0)
+ drop_mmu_context(mm, cpu);
} else
r4k_blast_icache_page_indexed(page);
}