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authorYoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>2006-07-07 17:42:12 +0200
committerRalf Baechle <ralf@linux-mips.org>2006-07-13 22:26:11 +0200
commit2874fe55332e2fb4e9c8e672cf2b7361bb168d17 (patch)
treebf62c9191328f2874745f9afb77187d0eca9ee2a /arch/mips/mm/c-r4k.c
parent[MIPS] vr41xx: Changed workaround to recommended method (diff)
downloadlinux-2874fe55332e2fb4e9c8e672cf2b7361bb168d17.tar.xz
linux-2874fe55332e2fb4e9c8e672cf2b7361bb168d17.zip
[MIPS] vr41xx: Replace magic number for P4K bit with symbol.
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm/c-r4k.c')
-rw-r--r--arch/mips/mm/c-r4k.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index d5111d165434..069803f58f3b 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -862,7 +862,7 @@ static void __init probe_pcache(void)
break;
case CPU_VR4133:
- write_c0_config(config & ~CONF_EB);
+ write_c0_config(config & ~VR41_CONF_P4K);
case CPU_VR4131:
/* Workaround for cache instruction bug of VR4131 */
if (c->processor_id == 0x0c80U || c->processor_id == 0x0c81U ||