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authorLinus Torvalds <torvalds@linux-foundation.org>2008-04-07 23:54:07 +0200
committerLinus Torvalds <torvalds@linux-foundation.org>2008-04-07 23:54:07 +0200
commitff09e2afe742f3ff52a0c9a660e8a3fe30cf587c (patch)
treeaff06e82c7d653d0b15c1f3cae7f0c8a90ba3d14 /arch/mips/mm/c-tx39.c
parentMerge git://git.kernel.org/pub/scm/linux/kernel/git/bart/ide-2.6 (diff)
parent[MIPS] Handle aliases in vmalloc correctly. (diff)
downloadlinux-ff09e2afe742f3ff52a0c9a660e8a3fe30cf587c.tar.xz
linux-ff09e2afe742f3ff52a0c9a660e8a3fe30cf587c.zip
Merge branch 'upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/ralf/upstream-linus
* 'upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/ralf/upstream-linus: [MIPS] Handle aliases in vmalloc correctly.
Diffstat (limited to 'arch/mips/mm/c-tx39.c')
-rw-r--r--arch/mips/mm/c-tx39.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c
index b09d56981d53..a9f7f1f5e9b4 100644
--- a/arch/mips/mm/c-tx39.c
+++ b/arch/mips/mm/c-tx39.c
@@ -122,6 +122,16 @@ static inline void tx39_blast_icache(void)
local_irq_restore(flags);
}
+static void tx39__flush_cache_vmap(void)
+{
+ tx39_blast_dcache();
+}
+
+static void tx39__flush_cache_vunmap(void)
+{
+ tx39_blast_dcache();
+}
+
static inline void tx39_flush_cache_all(void)
{
if (!cpu_has_dc_aliases)
@@ -344,6 +354,8 @@ void __cpuinit tx39_cache_init(void)
switch (current_cpu_type()) {
case CPU_TX3912:
/* TX39/H core (writethru direct-map cache) */
+ __flush_cache_vmap = tx39__flush_cache_vmap;
+ __flush_cache_vunmap = tx39__flush_cache_vunmap;
flush_cache_all = tx39h_flush_icache_all;
__flush_cache_all = tx39h_flush_icache_all;
flush_cache_mm = (void *) tx39h_flush_icache_all;
@@ -369,6 +381,9 @@ void __cpuinit tx39_cache_init(void)
write_c0_wired(0); /* set 8 on reset... */
/* board-dependent init code may set WBON */
+ __flush_cache_vmap = tx39__flush_cache_vmap;
+ __flush_cache_vunmap = tx39__flush_cache_vunmap;
+
flush_cache_all = tx39_flush_cache_all;
__flush_cache_all = tx39___flush_cache_all;
flush_cache_mm = tx39_flush_cache_mm;