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authorRalf Baechle <ralf@linux-mips.org>2011-06-17 17:20:28 +0200
committerRalf Baechle <ralf@linux-mips.org>2011-10-20 16:00:18 +0200
commitd9cdc901af0f92da7f90c750d8c187f5500be067 (patch)
tree1b5e11202d86081253ab1422e302b45902a346a3 /arch/mips/mm/c-tx39.c
parentMIPS: Lantiq: Fix MTD registration of NOR device (diff)
downloadlinux-d9cdc901af0f92da7f90c750d8c187f5500be067.tar.xz
linux-d9cdc901af0f92da7f90c750d8c187f5500be067.zip
MIPS: cache: Provide cache flush operations for XFS
Until now flush_kernel_vmap_range() and invalidate_kernel_vmap_range() did not exist on MIPS resulting in heavy cache corruption on XFS filesystems. Left for the post-3.0 time: optimization and make this work with highmem, too. Since the combination of highmem + cache aliases atm doesn't work this isn't a regression. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2505/
Diffstat (limited to 'arch/mips/mm/c-tx39.c')
-rw-r--r--arch/mips/mm/c-tx39.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c
index d352fad3e451..a43c197ccf8c 100644
--- a/arch/mips/mm/c-tx39.c
+++ b/arch/mips/mm/c-tx39.c
@@ -253,6 +253,11 @@ static void tx39_flush_icache_range(unsigned long start, unsigned long end)
}
}
+static void tx39_flush_kernel_vmap_range(unsigned long vaddr, int size)
+{
+ BUG();
+}
+
static void tx39_dma_cache_wback_inv(unsigned long addr, unsigned long size)
{
unsigned long end;
@@ -394,6 +399,8 @@ void __cpuinit tx39_cache_init(void)
flush_icache_range = tx39_flush_icache_range;
local_flush_icache_range = tx39_flush_icache_range;
+ __flush_kernel_vmap_range = tx39_flush_kernel_vmap_range;
+
flush_cache_sigtramp = tx39_flush_cache_sigtramp;
local_flush_data_cache_page = local_tx39_flush_data_cache_page;
flush_data_cache_page = tx39_flush_data_cache_page;