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| author | Atsushi Nemoto <anemo@mba.ocn.ne.jp> | 2006-03-13 10:23:03 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2006-03-18 17:59:27 +0100 |
| commit | de62893bc0725f8b5f0445250577cd7a10b2d8f8 (patch) | |
| tree | 3a5d77b8e8aa66113431ebe287c552749c2e8fee /arch/mips/mm/c-tx39.c | |
| parent | [MIPS] SB1: Fix interrupt disable hazard. (diff) | |
| download | linux-de62893bc0725f8b5f0445250577cd7a10b2d8f8.tar.xz linux-de62893bc0725f8b5f0445250577cd7a10b2d8f8.zip | |
[MIPS] local_r4k_flush_cache_page fix
If dcache_size != icache_size or dcache_size != scache_size, or
set-associative cache, icache/scache does not flushed properly. Make
blast_?cache_page_indexed() masks its index value correctly. Also,
use physical address for physically indexed pcache/scache.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm/c-tx39.c')
| -rw-r--r-- | arch/mips/mm/c-tx39.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/mips/mm/c-tx39.c b/arch/mips/mm/c-tx39.c index 7c572bea4a98..fe232e3988e3 100644 --- a/arch/mips/mm/c-tx39.c +++ b/arch/mips/mm/c-tx39.c @@ -210,7 +210,6 @@ static void tx39_flush_cache_page(struct vm_area_struct *vma, unsigned long page * Do indexed flush, too much work to get the (possible) TLB refills * to work correctly. */ - page = (KSEG0 + (page & (dcache_size - 1))); if (cpu_has_dc_aliases || exec) tx39_blast_dcache_page_indexed(page); if (exec) |