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author | David Daney <ddaney@caviumnetworks.com> | 2009-10-14 21:16:56 +0200 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2009-12-17 02:57:01 +0100 |
commit | 82622284dd2f8791f9759f3cef601520a8bc63b2 (patch) | |
tree | ee47f43af373d0c021cc83ff9e22925942e9d001 /arch/mips/mm/init.c | |
parent | MIPS: Add drotr and dins instructions to uasm. (diff) | |
download | linux-82622284dd2f8791f9759f3cef601520a8bc63b2.tar.xz linux-82622284dd2f8791f9759f3cef601520a8bc63b2.zip |
MIPS: Put PGD in C0_CONTEXT for 64-bit R2 processors.
Processors that support the mips64r2 ISA can in four instructions
convert a shifted PGD pointer stored in the upper bits of c0_context
into a usable pointer. By doing this we save a memory load and
associated potential cache miss in the TLB exception handlers.
Since the upper bits of c0_context were holding the CPU number, we
move this to the upper bits of c0_xcontext which doesn't have enough
bits to hold the PGD pointer, but has plenty for the CPU number.
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mm/init.c')
-rw-r--r-- | arch/mips/mm/init.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 8d1f4f363049..9e8d00389eef 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c @@ -462,7 +462,9 @@ void __init_refok free_initmem(void) __pa_symbol(&__init_end)); } +#ifndef CONFIG_MIPS_PGD_C0_CONTEXT unsigned long pgd_current[NR_CPUS]; +#endif /* * On 64-bit we've got three-level pagetables with a slightly * different layout ... |