diff options
| author | James Hogan <james.hogan@imgtec.com> | 2016-06-15 20:29:59 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2016-06-15 23:58:38 +0200 |
| commit | 4b34bca0e4c7091a06d774342faf8c9a4836af22 (patch) | |
| tree | 8cd4c322296ff4d2c97ce2ac83fa01afefccbc6d /arch/mips/mm | |
| parent | MIPS: KVM: Use host CCA for TLB mappings (diff) | |
| download | linux-4b34bca0e4c7091a06d774342faf8c9a4836af22.tar.xz linux-4b34bca0e4c7091a06d774342faf8c9a4836af22.zip | |
MIPS: Add define for Config.VI (virtual icache) bit
The Config.VI bit specifies that the instruction cache is virtually
tagged, which is checked in c-r4k.c's probe_pcache(). Add a proper
definition for it in mipsregs.h and make use of it.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'arch/mips/mm')
| -rw-r--r-- | arch/mips/mm/c-r4k.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index ef7f925dd1b0..7a9c345e87e5 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -1206,7 +1206,7 @@ static void probe_pcache(void) c->icache.linesz; c->icache.waybit = __ffs(icache_size/c->icache.ways); - if (config & 0x8) /* VI bit */ + if (config & MIPS_CONF_VI) c->icache.flags |= MIPS_CACHE_VTAG; /* |