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author | Linus Torvalds <torvalds@linux-foundation.org> | 2021-11-05 16:13:19 +0100 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2021-11-05 16:13:19 +0100 |
commit | a3f36773802d44d1e50e7c4c09b3e17018581d11 (patch) | |
tree | 20cd7768ce06c0d8249ff45f35d1ed59fcc325ae /arch/mips/mm | |
parent | Merge tag 'hsi-for-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/sre... (diff) | |
parent | MIPS: Cobalt: Explain GT64111 early PCI fixup (diff) | |
download | linux-a3f36773802d44d1e50e7c4c09b3e17018581d11.tar.xz linux-a3f36773802d44d1e50e7c4c09b3e17018581d11.zip |
Merge tag 'mips_5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Thomas Bogendoerfer:
- added printing of CPU options for /proc/cpuinfo
- removed support for Netlogic SOCs
- fixes and cleanup
* tag 'mips_5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
MIPS: Cobalt: Explain GT64111 early PCI fixup
mips: fix HUGETLB function without THP enabled
mips: cm: Convert to bitfield API to fix out-of-bounds access
MIPS: Remove NETLOGIC support
MIPS: kernel: proc: add CPU option reporting
MIPS: kernel: proc: use seq_puts instead of seq_printf
MIPS: kernel: proc: fix trivial style errors
MIPS: Fix assembly error from MIPSr2 code used within MIPS_ISA_ARCH_LEVEL
MIPS: octeon: Remove unused functions
MIPS: Loongson64: Add of_node_put() before break
bcm47xx: Replace printk(KERN_ALERT ... pci_devname(dev)) with pci_alert()
bcm47xx: Get rid of redundant 'else'
MIPS: sni: Fix the build
MIPS: Avoid macro redefinitions
MIPS: loongson64: Fix no screen display during boot-up
MIPS: loongson64: make CPU_LOONGSON64 depends on MIPS_FP_SUPPORT
Diffstat (limited to 'arch/mips/mm')
-rw-r--r-- | arch/mips/mm/c-r4k.c | 2 | ||||
-rw-r--r-- | arch/mips/mm/tlbex.c | 9 |
2 files changed, 1 insertions, 10 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 74b09e801c3a..50261fd8eb21 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -1410,7 +1410,6 @@ static void probe_pcache(void) case CPU_I6500: case CPU_SB1: case CPU_SB1A: - case CPU_XLR: c->dcache.flags |= MIPS_CACHE_PINDEX; break; @@ -1699,7 +1698,6 @@ static void setup_scache(void) return; case CPU_CAVIUM_OCTEON3: - case CPU_XLP: /* don't need to worry about L2, fully coherent */ return; diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 9adad24c2e65..b131e6a77383 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -325,13 +325,7 @@ static unsigned int kscratch_used_mask; static inline int __maybe_unused c0_kscratch(void) { - switch (current_cpu_type()) { - case CPU_XLP: - case CPU_XLR: - return 22; - default: - return 31; - } + return 31; } static int allocate_kscratch(void) @@ -553,7 +547,6 @@ void build_tlb_write_entry(u32 **p, struct uasm_label **l, case CPU_5KC: case CPU_TX49XX: case CPU_PR4450: - case CPU_XLR: uasm_i_nop(p); tlbw(p); break; |