summaryrefslogtreecommitdiffstats
path: root/arch/mips/mm
diff options
context:
space:
mode:
authorTakashi Iwai <tiwai@suse.de>2013-04-15 19:45:16 +0200
committerTakashi Iwai <tiwai@suse.de>2013-04-15 19:45:16 +0200
commitad2109d7d258a92fa016f1f36b423bfcc69f7efc (patch)
treef1a98ab99b8e80c376b13ac3a82d750ab9b179cf /arch/mips/mm
parentALSA: usb-audio: disable autopm for MIDI devices (diff)
parentMerge remote-tracking branch 'asoc/topic/wm8994' into asoc-next (diff)
downloadlinux-ad2109d7d258a92fa016f1f36b423bfcc69f7efc.tar.xz
linux-ad2109d7d258a92fa016f1f36b423bfcc69f7efc.zip
Merge tag 'asoc-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next
ASoC: Updates for v3.10 A bunch of changes here, the most interesting one subsystem wise being Morimoto-san's work to create snd_soc_component which doesn't do much for now but will be pretty important going forwards: - Add a new component object type which will form the basis of moving to a more generic handling of SoC and off-SoC components, contributed by Kuninori Morimoto. - A fairly large set of cleanups for the dmaengine integration from Lars-Peter Clausen, starting to move towards being able to have a generic driver based on the library. - Performance optimisations to DAPM from Ryo Tsutsui. - Support for mixer control sharing in DAPM from Stephen Warren. - Multiplatform ARM cleanups from Arnd Bergmann. - New CODEC drivers for AK5385 and TAS5086 from Daniel Mack.
Diffstat (limited to 'arch/mips/mm')
-rw-r--r--arch/mips/mm/c-r4k.c6
-rw-r--r--arch/mips/mm/sc-mips.c6
2 files changed, 4 insertions, 8 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index ecca559b8d7b..2078915eacb9 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -1247,10 +1247,8 @@ static void __cpuinit setup_scache(void)
return;
default:
- if (c->isa_level == MIPS_CPU_ISA_M32R1 ||
- c->isa_level == MIPS_CPU_ISA_M32R2 ||
- c->isa_level == MIPS_CPU_ISA_M64R1 ||
- c->isa_level == MIPS_CPU_ISA_M64R2) {
+ if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 |
+ MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2)) {
#ifdef CONFIG_MIPS_CPU_SCACHE
if (mips_sc_init ()) {
scache_size = c->scache.ways * c->scache.sets * c->scache.linesz;
diff --git a/arch/mips/mm/sc-mips.c b/arch/mips/mm/sc-mips.c
index 93d937b4b1ba..df96da7e939b 100644
--- a/arch/mips/mm/sc-mips.c
+++ b/arch/mips/mm/sc-mips.c
@@ -98,10 +98,8 @@ static inline int __init mips_sc_probe(void)
c->scache.flags |= MIPS_CACHE_NOT_PRESENT;
/* Ignore anything but MIPSxx processors */
- if (c->isa_level != MIPS_CPU_ISA_M32R1 &&
- c->isa_level != MIPS_CPU_ISA_M32R2 &&
- c->isa_level != MIPS_CPU_ISA_M64R1 &&
- c->isa_level != MIPS_CPU_ISA_M64R2)
+ if (!(c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 |
+ MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2)))
return 0;
/* Does this MIPS32/MIPS64 CPU have a config2 register? */