diff options
| author | Huacai Chen <chenhc@lemote.com> | 2020-06-17 14:34:42 +0200 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-07-08 11:15:53 +0200 |
| commit | 04ef32aff23911006db97d3814290097327a2160 (patch) | |
| tree | d5d653a7eca8c03249f84a7679d6495890709c94 /arch/mips/mm | |
| parent | dt-bindings: MIPS: Fix tabs in Ingenic SoCs binding. (diff) | |
| download | linux-04ef32aff23911006db97d3814290097327a2160.tar.xz linux-04ef32aff23911006db97d3814290097327a2160.zip | |
MIPS: Unify naming style of vendor CP0.Config6 bits
Other vendor-defined registers use the vendor name as a prefix, not an
infix, so unify the naming style of CP0.Config6 bits.
Suggested-by: Maciej W. Rozycki" <macro@linux-mips.org>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Reviewed-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/mm')
| -rw-r--r-- | arch/mips/mm/c-r4k.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 49569e5666d7..fc5a6d25f74f 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -1066,12 +1066,12 @@ static inline int alias_74k_erratum(struct cpuinfo_mips *c) if (rev <= PRID_REV_ENCODE_332(2, 4, 0)) present = 1; if (rev == PRID_REV_ENCODE_332(2, 4, 0)) - write_c0_config6(read_c0_config6() | MIPS_CONF6_MTI_SYND); + write_c0_config6(read_c0_config6() | MTI_CONF6_SYND); break; case PRID_IMP_1074K: if (rev <= PRID_REV_ENCODE_332(1, 1, 0)) { present = 1; - write_c0_config6(read_c0_config6() | MIPS_CONF6_MTI_SYND); + write_c0_config6(read_c0_config6() | MTI_CONF6_SYND); } break; default: |