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| author | Paul Burton <paul.burton@mips.com> | 2019-02-02 02:43:27 +0100 |
|---|---|---|
| committer | Paul Burton <paul.burton@mips.com> | 2019-02-04 19:56:35 +0100 |
| commit | 535113896e802e9f8f92c05a887d1761c34ae903 (patch) | |
| tree | 4d0b573a5ad008f478f806e585aec22db77e03cc /arch/mips/mm | |
| parent | MIPS: mm: Add set_cpu_context() for ASID assignments (diff) | |
| download | linux-535113896e802e9f8f92c05a887d1761c34ae903.tar.xz linux-535113896e802e9f8f92c05a887d1761c34ae903.zip | |
MIPS: Add GINVT instruction helpers
Add a family of ginvt_* functions making it easy to emit a GINVT
instruction to globally invalidate TLB entries. We make use of the
_ASM_MACRO infrastructure to support emitting the instructions even if
the assembler isn't new enough to support them natively.
An associated STYPE_GINV definition & sync_ginv() function are added to
emit a sync instruction of type 0x14, which operates as a completion
barrier for these new GINVT (and GINVI) instructions.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Diffstat (limited to 'arch/mips/mm')
0 files changed, 0 insertions, 0 deletions