diff options
| author | Jayachandran C <jchandra@broadcom.com> | 2015-01-09 11:43:20 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2015-04-01 17:21:52 +0200 |
| commit | 5084e93dfeebd171e0ad02cc7ea560364a7f80b3 (patch) | |
| tree | 1cd86fe1fb2f0da8888c562fa926033c16963e0b /arch/mips/netlogic/common | |
| parent | MIPS: Netlogic: Update function to read DRAM BARs (diff) | |
| download | linux-5084e93dfeebd171e0ad02cc7ea560364a7f80b3.tar.xz linux-5084e93dfeebd171e0ad02cc7ea560364a7f80b3.zip | |
MIPS: Netlogic: Handle XLP hardware errata
Core configuration register IFU_BRUB_RESERVE has to be setup to handle
a silicon errata which can result in a CPU hang.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8902/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/netlogic/common')
| -rw-r--r-- | arch/mips/netlogic/common/reset.S | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/mips/netlogic/common/reset.S b/arch/mips/netlogic/common/reset.S index 701c4bcb9e47..e3e518974e0b 100644 --- a/arch/mips/netlogic/common/reset.S +++ b/arch/mips/netlogic/common/reset.S @@ -235,6 +235,26 @@ EXPORT(nlm_boot_siblings) mfc0 v0, CP0_EBASE, 1 andi v0, 0x3ff /* v0 <- node/core */ + /* + * Errata: to avoid potential live lock, setup IFU_BRUB_RESERVE + * when running 4 threads per core + */ + andi v1, v0, 0x3 /* v1 <- thread id */ + bnez v1, 2f + nop + + /* thread 0 of each core. */ + li t0, CKSEG1ADDR(RESET_DATA_PHYS) + lw t1, BOOT_THREAD_MODE(t0) /* t1 <- thread mode */ + subu t1, 0x3 /* 4-thread per core mode? */ + bnez t1, 2f + nop + + li t0, IFU_BRUB_RESERVE + li t1, 0x55 + mtcr t1, t0 + _ehb +2: beqz v0, 4f /* boot cpu (cpuid == 0)? */ nop |