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authorJayachandran C <jchandra@broadcom.com>2013-01-14 16:11:56 +0100
committerJohn Crispin <blogic@openwrt.org>2013-02-17 00:15:20 +0100
commita69ba6293d11b7dfd395a742f3449d6ddda8ecad (patch)
tree3a075124416c51c5548e93fa6e2803e22682d021 /arch/mips/netlogic
parentMIPS: PCI: Byteswap not needed in little-endian mode (diff)
downloadlinux-a69ba6293d11b7dfd395a742f3449d6ddda8ecad.tar.xz
linux-a69ba6293d11b7dfd395a742f3449d6ddda8ecad.zip
MIPS: Netlogic: Split XLP L1 i-cache among threads
Since we now use r4k cache code for Netlogic XLP, it is better to split L1 icache among the active threads, so that threads won't step on each other while flushing icache. The L1 dcache is already split among the threads in the core. Signed-off-by: Jayachandran C <jchandra@broadcom.com> Patchwork: http://patchwork.linux-mips.org/patch/4787/ Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/netlogic')
-rw-r--r--arch/mips/netlogic/common/smpboot.S6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/mips/netlogic/common/smpboot.S b/arch/mips/netlogic/common/smpboot.S
index a0b74874bebe..d772a87fe846 100644
--- a/arch/mips/netlogic/common/smpboot.S
+++ b/arch/mips/netlogic/common/smpboot.S
@@ -69,6 +69,12 @@
#endif
mtcr t1, t0
+ li t0, ICU_DEFEATURE
+ mfcr t1, t0
+ ori t1, 0x1000 /* Enable Icache partitioning */
+ mtcr t1, t0
+
+
#ifdef XLP_AX_WORKAROUND
li t0, SCHED_DEFEATURE
lui t1, 0x0100 /* Disable BRU accepting ALU ops */